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| author | Amit Kumar Mahapatra via Alsa-devel <alsa-devel@alsa-project.org> | 2023-03-10 20:32:03 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2023-03-11 15:34:01 +0300 |
| commit | 9e264f3f85a56cc109cc2d6010a48aa89d5c1ff1 (patch) | |
| tree | f4625d50e5c6c4190d20daa8cb770f84f51d540b /drivers/spi/spi-tegra210-quad.c | |
| parent | 21d19e601fd221cd61105286b0b6ec2f9c5a2576 (diff) | |
| download | linux-9e264f3f85a56cc109cc2d6010a48aa89d5c1ff1.tar.xz | |
spi: Replace all spi->chip_select and spi->cs_gpiod references with function call
Supporting multi-cs in spi drivers would require the chip_select & cs_gpiod
members of struct spi_device to be an array. But changing the type of these
members to array would break the spi driver functionality. To make the
transition smoother introduced four new APIs to get/set the
spi->chip_select & spi->cs_gpiod and replaced all spi->chip_select and
spi->cs_gpiod references with get or set API calls.
While adding multi-cs support in further patches the chip_select & cs_gpiod
members of the spi_device structure would be converted to arrays & the
"idx" parameter of the APIs would be used as array index i.e.,
spi->chip_select[idx] & spi->cs_gpiod[idx] respectively.
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
Acked-by: Heiko Stuebner <heiko@sntech.de> # Rockchip drivers
Reviewed-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org> # Aspeed driver
Reviewed-by: Dhruva Gole <d-gole@ti.com> # SPI Cadence QSPI
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> # spi-stm32-qspi
Acked-by: William Zhang <william.zhang@broadcom.com> # bcm63xx-hsspi driver
Reviewed-by: Serge Semin <fancer.lancer@gmail.com> # DW SSI part
Link: https://lore.kernel.org/r/167847070432.26.15076794204368669839@mailman-core.alsa-project.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-tegra210-quad.c')
| -rw-r--r-- | drivers/spi/spi-tegra210-quad.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c index fd0d532364e2..325b4427491c 100644 --- a/drivers/spi/spi-tegra210-quad.c +++ b/drivers/spi/spi-tegra210-quad.c @@ -829,7 +829,7 @@ static u32 tegra_qspi_setup_transfer_one(struct spi_device *spi, struct spi_tran tegra_qspi_mask_clear_irq(tqspi); command1 = tqspi->def_command1_reg; - command1 |= QSPI_CS_SEL(spi->chip_select); + command1 |= QSPI_CS_SEL(spi_get_chipselect(spi, 0)); command1 |= QSPI_BIT_LENGTH(bits_per_word - 1); command1 &= ~QSPI_CONTROL_MODE_MASK; @@ -960,11 +960,11 @@ static int tegra_qspi_setup(struct spi_device *spi) /* keep default cs state to inactive */ val = tqspi->def_command1_reg; - val |= QSPI_CS_SEL(spi->chip_select); + val |= QSPI_CS_SEL(spi_get_chipselect(spi, 0)); if (spi->mode & SPI_CS_HIGH) - val &= ~QSPI_CS_POL_INACTIVE(spi->chip_select); + val &= ~QSPI_CS_POL_INACTIVE(spi_get_chipselect(spi, 0)); else - val |= QSPI_CS_POL_INACTIVE(spi->chip_select); + val |= QSPI_CS_POL_INACTIVE(spi_get_chipselect(spi, 0)); tqspi->def_command1_reg = val; tegra_qspi_writel(tqspi, tqspi->def_command1_reg, QSPI_COMMAND1); |