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author | Gilad Ben-Yossef <gilad@benyossef.com> | 2017-11-06 09:55:51 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-11-06 18:47:04 +0300 |
commit | 57a1f2a04a74e8b21bfb7bda4aa18adc8ae9f57c (patch) | |
tree | ef16ef0560c47e0daaca07cec4d35eeeb1a9be89 /drivers/staging/ccree/ssi_driver.c | |
parent | e979f35675862fdd38b63475d1c1fdf66361460d (diff) | |
download | linux-57a1f2a04a74e8b21bfb7bda4aa18adc8ae9f57c.tar.xz |
staging: ccree: simplify registers access
The register offset calculation macro was taking a HW block base
parameter that was not actually used. Simplify the whole thing
by dropping it and rename the macro for better readability.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/ccree/ssi_driver.c')
-rw-r--r-- | drivers/staging/ccree/ssi_driver.c | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/drivers/staging/ccree/ssi_driver.c b/drivers/staging/ccree/ssi_driver.c index 135a7e2d5546..1a9b9c979004 100644 --- a/drivers/staging/ccree/ssi_driver.c +++ b/drivers/staging/ccree/ssi_driver.c @@ -99,22 +99,22 @@ static irqreturn_t cc_isr(int irq, void *dev_id) /* STAT_OP_TYPE_GENERIC STAT_PHASE_0: Interrupt */ /* read the interrupt status */ - irr = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRR)); + irr = CC_HAL_READ_REGISTER(CC_REG(HOST_IRR)); dev_dbg(dev, "Got IRR=0x%08X\n", irr); if (unlikely(irr == 0)) { /* Probably shared interrupt line */ dev_err(dev, "Got interrupt with empty IRR\n"); return IRQ_NONE; } - imr = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR)); + imr = CC_HAL_READ_REGISTER(CC_REG(HOST_IMR)); /* clear interrupt - must be before processing events */ - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_ICR), irr); + CC_HAL_WRITE_REGISTER(CC_REG(HOST_ICR), irr); drvdata->irq = irr; /* Completion interrupt - most probable */ if (likely((irr & SSI_COMP_IRQ_MASK) != 0)) { /* Mask AXI completion interrupt - will be unmasked in Deferred service handler */ - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR), imr | SSI_COMP_IRQ_MASK); + CC_HAL_WRITE_REGISTER(CC_REG(HOST_IMR), imr | SSI_COMP_IRQ_MASK); irr &= ~SSI_COMP_IRQ_MASK; complete_request(drvdata); } @@ -122,7 +122,7 @@ static irqreturn_t cc_isr(int irq, void *dev_id) /* TEE FIPS interrupt */ if (likely((irr & SSI_GPR0_IRQ_MASK) != 0)) { /* Mask interrupt - will be unmasked in Deferred service handler */ - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR), imr | SSI_GPR0_IRQ_MASK); + CC_HAL_WRITE_REGISTER(CC_REG(HOST_IMR), imr | SSI_GPR0_IRQ_MASK); irr &= ~SSI_GPR0_IRQ_MASK; fips_handler(drvdata); } @@ -132,7 +132,7 @@ static irqreturn_t cc_isr(int irq, void *dev_id) u32 axi_err; /* Read the AXI error ID */ - axi_err = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_MON_ERR)); + axi_err = CC_HAL_READ_REGISTER(CC_REG(AXIM_MON_ERR)); dev_dbg(dev, "AXI completion error: axim_mon_err=0x%08X\n", axi_err); @@ -155,43 +155,43 @@ int init_cc_regs(struct ssi_drvdata *drvdata, bool is_probe) struct device *dev = drvdata_to_dev(drvdata); /* Unmask all AXI interrupt sources AXI_CFG1 register */ - val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CFG)); - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CFG), val & ~SSI_AXI_IRQ_MASK); + val = CC_HAL_READ_REGISTER(CC_REG(AXIM_CFG)); + CC_HAL_WRITE_REGISTER(CC_REG(AXIM_CFG), val & ~SSI_AXI_IRQ_MASK); dev_dbg(dev, "AXIM_CFG=0x%08X\n", - CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CFG))); + CC_HAL_READ_REGISTER(CC_REG(AXIM_CFG))); /* Clear all pending interrupts */ - val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRR)); + val = CC_HAL_READ_REGISTER(CC_REG(HOST_IRR)); dev_dbg(dev, "IRR=0x%08X\n", val); - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_ICR), val); + CC_HAL_WRITE_REGISTER(CC_REG(HOST_ICR), val); /* Unmask relevant interrupt cause */ val = (unsigned int)(~(SSI_COMP_IRQ_MASK | SSI_AXI_ERR_IRQ_MASK | SSI_GPR0_IRQ_MASK)); - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR), val); + CC_HAL_WRITE_REGISTER(CC_REG(HOST_IMR), val); #ifdef DX_HOST_IRQ_TIMER_INIT_VAL_REG_OFFSET #ifdef DX_IRQ_DELAY /* Set CC IRQ delay */ - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRQ_TIMER_INIT_VAL), + CC_HAL_WRITE_REGISTER(CC_REG(HOST_IRQ_TIMER_INIT_VAL), DX_IRQ_DELAY); #endif - if (CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRQ_TIMER_INIT_VAL)) > 0) { + if (CC_HAL_READ_REGISTER(CC_REG(HOST_IRQ_TIMER_INIT_VAL)) > 0) { dev_dbg(dev, "irq_delay=%d CC cycles\n", - CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRQ_TIMER_INIT_VAL))); + CC_HAL_READ_REGISTER(CC_REG(HOST_IRQ_TIMER_INIT_VAL))); } #endif cache_params = (drvdata->coherent ? CC_COHERENT_CACHE_PARAMS : 0x0); - val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CACHE_PARAMS)); + val = CC_HAL_READ_REGISTER(CC_REG(AXIM_CACHE_PARAMS)); if (is_probe) dev_info(dev, "Cache params previous: 0x%08X\n", val); - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CACHE_PARAMS), + CC_HAL_WRITE_REGISTER(CC_REG(AXIM_CACHE_PARAMS), cache_params); - val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CACHE_PARAMS)); + val = CC_HAL_READ_REGISTER(CC_REG(AXIM_CACHE_PARAMS)); if (is_probe) dev_info(dev, "Cache params current: 0x%08X (expect: 0x%08X)\n", @@ -280,7 +280,7 @@ static int init_cc_resources(struct platform_device *plat_dev) } /* Verify correct mapping */ - signature_val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_SIGNATURE)); + signature_val = CC_HAL_READ_REGISTER(CC_REG(HOST_SIGNATURE)); if (signature_val != DX_DEV_SIGNATURE) { dev_err(dev, "Invalid CC signature: SIGNATURE=0x%08X != expected=0x%08X\n", signature_val, (u32)DX_DEV_SIGNATURE); @@ -292,7 +292,7 @@ static int init_cc_resources(struct platform_device *plat_dev) /* Display HW versions */ dev_info(dev, "ARM CryptoCell %s Driver: HW version 0x%08X, Driver version %s\n", SSI_DEV_NAME_STR, - CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_VERSION)), + CC_HAL_READ_REGISTER(CC_REG(HOST_VERSION)), DRV_MODULE_VERSION); rc = init_cc_regs(new_drvdata, true); @@ -411,7 +411,7 @@ void fini_cc_regs(struct ssi_drvdata *drvdata) { /* Mask all interrupts */ WRITE_REGISTER(drvdata->cc_base + - CC_REG_OFFSET(HOST_RGF, HOST_IMR), 0xFFFFFFFF); + CC_REG(HOST_IMR), 0xFFFFFFFF); } static void cleanup_cc_resources(struct platform_device *plat_dev) |