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authorMika Westerberg <mika.westerberg@linux.intel.com>2022-01-07 14:00:47 +0300
committerMika Westerberg <mika.westerberg@linux.intel.com>2022-02-02 13:56:51 +0300
commit30a4eca69b76c0ed5a2f34dd2a3e195c9bf6bed1 (patch)
tree00596d61cefc48c5f5ad681f822bb0f9a143708b /drivers/thunderbolt/tb_regs.h
parentf1d5ec3e0eabaf961ed16516bf35e24b48cda483 (diff)
downloadlinux-30a4eca69b76c0ed5a2f34dd2a3e195c9bf6bed1.tar.xz
thunderbolt: Add internal xHCI connect flows for Thunderbolt 3 devices
Both Alpine Ridge and Titan Ridge require special flows in order to activate the internal xHCI controller when there is USB device connected to the downstream type-C port. This implements the missing flows for both. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/thunderbolt/tb_regs.h')
-rw-r--r--drivers/thunderbolt/tb_regs.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/thunderbolt/tb_regs.h b/drivers/thunderbolt/tb_regs.h
index 9693a6ec5950..70795a2aa9bb 100644
--- a/drivers/thunderbolt/tb_regs.h
+++ b/drivers/thunderbolt/tb_regs.h
@@ -463,6 +463,8 @@ struct tb_regs_hop {
#define TMU_ADP_CS_6_DISABLE_TMU_OBJ_CL2 BIT(3)
/* Plug Events registers */
+#define TB_PLUG_EVENTS_USB_DISABLE BIT(2)
+
#define TB_PLUG_EVENTS_PCIE_WR_DATA 0x1b
#define TB_PLUG_EVENTS_PCIE_CMD 0x1c
#define TB_PLUG_EVENTS_PCIE_CMD_DW_OFFSET_MASK GENMASK(9, 0)
@@ -502,6 +504,9 @@ struct tb_regs_hop {
#define TB_LC_POWER 0x740
/* Link controller registers */
+#define TB_LC_CS_42 0x2a
+#define TB_LC_CS_42_USB_PLUGGED BIT(31)
+
#define TB_LC_PORT_ATTR 0x8d
#define TB_LC_PORT_ATTR_BE BIT(12)
@@ -522,4 +527,7 @@ struct tb_regs_hop {
#define TB_LC_LINK_ATTR 0x97
#define TB_LC_LINK_ATTR_CPS BIT(18)
+#define TB_LC_LINK_REQ 0xad
+#define TB_LC_LINK_REQ_XHCI_CONNECT BIT(31)
+
#endif