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authorSherry Sun <sherry.sun@nxp.com>2023-08-01 05:23:04 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2023-08-23 18:52:31 +0300
commit0693c8f134f97f8973621be76b17be8efbe17589 (patch)
tree77655d8c52ec4f447389bf84c7dce894c2e1e30b /drivers/tty
parent31311a9a4baae0ad47c85e448af21b2120344ff0 (diff)
downloadlinux-0693c8f134f97f8973621be76b17be8efbe17589.tar.xz
tty: serial: fsl_lpuart: Clear the error flags by writing 1 for lpuart32 platforms
commit 282069845af388b08d622ad192b831dcd0549c62 upstream. Do not read the data register to clear the error flags for lpuart32 platforms, the additional read may cause the receive FIFO underflow since the DMA has already read the data register. Actually all lpuart32 platforms support write 1 to clear those error bits, let's use this method to better clear the error flags. Fixes: 42b68768e51b ("serial: fsl_lpuart: DMA support for 32-bit variant") Cc: stable <stable@kernel.org> Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Link: https://lore.kernel.org/r/20230801022304.24251-1-sherry.sun@nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty')
-rw-r--r--drivers/tty/serial/fsl_lpuart.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
index f6d0ea2c6be4..c5a9b89c4d31 100644
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -1125,8 +1125,8 @@ static void lpuart_copy_rx_to_tty(struct lpuart_port *sport)
unsigned long sr = lpuart32_read(&sport->port, UARTSTAT);
if (sr & (UARTSTAT_PE | UARTSTAT_FE)) {
- /* Read DR to clear the error flags */
- lpuart32_read(&sport->port, UARTDATA);
+ /* Clear the error flags */
+ lpuart32_write(&sport->port, sr, UARTSTAT);
if (sr & UARTSTAT_PE)
sport->port.icount.parity++;