diff options
| author | Bart Van Assche <bvanassche@acm.org> | 2023-09-21 22:22:47 +0300 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2023-09-27 18:12:50 +0300 |
| commit | 858231bdb223916d6fa56fd0278074905cc201c1 (patch) | |
| tree | 488bf4eba6192a80c5872f01e2b0124a9f71b041 /drivers/ufs/host | |
| parent | cdaaff61d3bfd61aa3966eb1624e66c4152e6d1d (diff) | |
| download | linux-858231bdb223916d6fa56fd0278074905cc201c1.tar.xz | |
scsi: ufs: core: Move the 4K alignment code into the Exynos driver
The DMA alignment for the Exynos controller follows directly from the PRDT
segment size configured in ufs-exynos.c. Hence, move the DMA alignment code
into the Exynos driver source code.
Cc: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Bart Van Assche <bvanassche@acm.org>
Link: https://lore.kernel.org/r/20230921192335.676924-3-bvanassche@acm.org
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'drivers/ufs/host')
| -rw-r--r-- | drivers/ufs/host/ufs-exynos.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/ufs/host/ufs-exynos.c b/drivers/ufs/host/ufs-exynos.c index 3396e0388512..e5d145a2676e 100644 --- a/drivers/ufs/host/ufs-exynos.c +++ b/drivers/ufs/host/ufs-exynos.c @@ -1511,6 +1511,11 @@ static int fsd_ufs_pre_link(struct exynos_ufs *ufs) return 0; } +static void exynos_ufs_config_scsi_dev(struct scsi_device *sdev) +{ + blk_queue_update_dma_alignment(sdev->request_queue, SZ_4K - 1); +} + static int fsd_ufs_post_link(struct exynos_ufs *ufs) { int i; @@ -1579,6 +1584,7 @@ static const struct ufs_hba_variant_ops ufs_hba_exynos_ops = { .hibern8_notify = exynos_ufs_hibern8_notify, .suspend = exynos_ufs_suspend, .resume = exynos_ufs_resume, + .config_scsi_dev = exynos_ufs_config_scsi_dev, }; static struct ufs_hba_variant_ops ufs_hba_exynosauto_vh_ops = { @@ -1680,8 +1686,7 @@ static const struct exynos_ufs_drv_data exynos_ufs_drvs = { UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR | UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR | UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL | - UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING | - UFSHCD_QUIRK_4KB_DMA_ALIGNMENT, + UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING, .opts = EXYNOS_UFS_OPT_HAS_APB_CLK_CTRL | EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL | EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX | |