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authorLinus Torvalds <torvalds@linux-foundation.org>2014-09-01 04:01:19 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-09-01 04:01:19 +0400
commit19ed3eb975b7de9b4b0e41714eb9302cd95e7ae6 (patch)
tree6cb9826aaf9276b707876ce227291c08934ec6b0 /drivers
parent81bbadc6374773c5d8737de29386d3abdef909f4 (diff)
parente160cc17688cc6f24211cbc2e2a6e872e08dd4d6 (diff)
downloadlinux-19ed3eb975b7de9b4b0e41714eb9302cd95e7ae6.tar.xz
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson: "Here's the weekly batch of fixes from arm-soc. The delta is a largeish negative delta, due to revert of SMP support for Broadcom's STB SoC -- it was accidentally merged before some issues had been addressed, so they will make a new attempt for 3.18. I didn't see a need for a full revert of the whole platform due to this, we're keeping the rest enabled. The rest is mostly: - a handful of DT fixes for i.MX (Hummingboard/Cubox-i in particular) - some MTD/NAND fixes for OMAP - minor DT fixes for shmobile - warning fix for UP builds on vexpress/spc There's also a couple of patches that wires up hwmod on TI's DRA7 SoC so it can boot. Drivers and the rest had landed for 3.17, and it's small and isolated so it made sense to pick up now even if it's not a bugfix" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits) vexpress/spc: fix a build warning on array bounds ARM: DRA7: hwmod: Add dra74x and dra72x specific ocp interface lists ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() variants MAINTAINERS: catch special Rockchip code locations ARM: dts: microsom-ar8035: MDIO pad must be set open drain ARM: dts: omap54xx-clocks: Fix the l3 and l4 clock rates ARM: brcmstb: revert SMP support ARM: OMAP2+: hwmod: Rearm wake-up interrupts for DT when MUSB is idled ARM: dts: Enable UART wake-up events for beagleboard ARM: dts: Remove twl6030 clk32g "regulator" ARM: OMAP2+: omap_device: remove warning that clk alias already exists ARM: OMAP: fix %d confusingly prefixed with 0x in format string ARM: dts: DRA7: fix interrupt-cells for GPIO mtd: nand: omap: Fix 1-bit Hamming code scheme, omap_calculate_ecc() ARM: dts: omap3430-sdp: Revert to using software ECC for NAND ARM: OMAP2+: GPMC: Support Software ECC scheme via DT mtd: nand: omap: Revert to using software ECC by default ARM: dts: hummingboard/cubox-i: change SPDIF output to be more descriptive ARM: dts: hummingboard/cubox-i: add USB OC pinctrl configuration ARM: shmobile: r8a7791: add missing 0x0100 for SDCKCR ...
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mtd/nand/omap2.c16
1 files changed, 12 insertions, 4 deletions
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index f0ed92e210a1..5967b385141b 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -931,7 +931,7 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
u32 val;
val = readl(info->reg.gpmc_ecc_config);
- if (((val >> ECC_CONFIG_CS_SHIFT) & ~CS_MASK) != info->gpmc_cs)
+ if (((val >> ECC_CONFIG_CS_SHIFT) & CS_MASK) != info->gpmc_cs)
return -EINVAL;
/* read ecc result */
@@ -1794,9 +1794,12 @@ static int omap_nand_probe(struct platform_device *pdev)
}
/* populate MTD interface based on ECC scheme */
- nand_chip->ecc.layout = &omap_oobinfo;
ecclayout = &omap_oobinfo;
switch (info->ecc_opt) {
+ case OMAP_ECC_HAM1_CODE_SW:
+ nand_chip->ecc.mode = NAND_ECC_SOFT;
+ break;
+
case OMAP_ECC_HAM1_CODE_HW:
pr_info("nand: using OMAP_ECC_HAM1_CODE_HW\n");
nand_chip->ecc.mode = NAND_ECC_HW;
@@ -1848,7 +1851,7 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.priv = nand_bch_init(mtd,
nand_chip->ecc.size,
nand_chip->ecc.bytes,
- &nand_chip->ecc.layout);
+ &ecclayout);
if (!nand_chip->ecc.priv) {
pr_err("nand: error: unable to use s/w BCH library\n");
err = -EINVAL;
@@ -1923,7 +1926,7 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.priv = nand_bch_init(mtd,
nand_chip->ecc.size,
nand_chip->ecc.bytes,
- &nand_chip->ecc.layout);
+ &ecclayout);
if (!nand_chip->ecc.priv) {
pr_err("nand: error: unable to use s/w BCH library\n");
err = -EINVAL;
@@ -2012,6 +2015,9 @@ static int omap_nand_probe(struct platform_device *pdev)
goto return_error;
}
+ if (info->ecc_opt == OMAP_ECC_HAM1_CODE_SW)
+ goto scan_tail;
+
/* all OOB bytes from oobfree->offset till end off OOB are free */
ecclayout->oobfree->length = mtd->oobsize - ecclayout->oobfree->offset;
/* check if NAND device's OOB is enough to store ECC signatures */
@@ -2021,7 +2027,9 @@ static int omap_nand_probe(struct platform_device *pdev)
err = -EINVAL;
goto return_error;
}
+ nand_chip->ecc.layout = ecclayout;
+scan_tail:
/* second phase scan */
if (nand_scan_tail(mtd)) {
err = -ENXIO;