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authorabdoulaye berthe <abdoulaye.berthe@amd.com>2019-09-18 18:57:47 +0300
committerAlex Deucher <alexander.deucher@amd.com>2019-11-13 23:29:43 +0300
commit903e859b72957985c60de593f364e33639964829 (patch)
tree021e753ea4f39dab37a5d92ce8b46c1ac2fc2901 /drivers
parent8e5100a575433cc185a2e224280fbd873b6692dd (diff)
downloadlinux-903e859b72957985c60de593f364e33639964829.tar.xz
drm/amd/display: check for dp rev before reading lttpr regs
[Why] LTTPR was introduced after DP1.2. Reading LTTPR registers 0xFXXXX on some DP 1.2 display is causing an unexpected behavior. [How] Make sure that we don't read any lttpr registers on 1.2 displays. Signed-off-by: abdoulaye berthe <abdoulaye.berthe@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 2a89f90ef7a7..1e4480f3bd3c 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -2759,9 +2759,10 @@ static bool retrieve_link_cap(struct dc_link *link)
/* Set default timeout to 3.2ms and read LTTPR capabilities */
bool ext_timeout_support = link->dc->caps.extended_aux_timeout_support &&
!link->dc->config.disable_extended_timeout_support;
+ link->is_lttpr_mode_transparent = true;
+
if (ext_timeout_support) {
status = dc_link_aux_configure_timeout(link->ddc, LINK_AUX_DEFAULT_EXTENDED_TIMEOUT_PERIOD);
- link->is_lttpr_mode_transparent = true;
}
memset(dpcd_data, '\0', sizeof(dpcd_data));
@@ -2796,7 +2797,7 @@ static bool retrieve_link_cap(struct dc_link *link)
return false;
}
- if (ext_timeout_support) {
+ if (ext_timeout_support && link->dpcd_caps.dpcd_rev.raw >= 0x14) {
status = core_link_read_dpcd(
link,
DP_PHY_REPEATER_CNT,