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| author | Sai Pavan Boddu <sai.pavan.boddu@amd.com> | 2024-05-03 12:42:08 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-06-12 12:12:26 +0300 |
| commit | bb220136ae510ee7561f5625d9bed6ee915697ea (patch) | |
| tree | bd3c4428067629d2fcbf52980cc4ef6f27567e9c /drivers | |
| parent | ec3468221efec6660ff656e9ebe51ced3520fc57 (diff) | |
| download | linux-bb220136ae510ee7561f5625d9bed6ee915697ea.tar.xz | |
i2c: cadence: Avoid fifo clear after start
[ Upstream commit c2e55b449de7298a751ed0256251019d302af453 ]
The Driver unintentionally programs ctrl reg to clear the fifo, which
happens after the start of transaction. Previously, this was not an issue
as it involved read-modified-write. However, this issue breaks i2c reads
on QEMU, as i2c-read is executed before guest starts programming control
register.
Fixes: ff0cf7bca630 ("i2c: cadence: Remove unnecessary register reads")
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/i2c/busses/i2c-cadence.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/i2c/busses/i2c-cadence.c b/drivers/i2c/busses/i2c-cadence.c index de3f58b60dce..6f7d753a8197 100644 --- a/drivers/i2c/busses/i2c-cadence.c +++ b/drivers/i2c/busses/i2c-cadence.c @@ -633,6 +633,7 @@ static void cdns_i2c_mrecv(struct cdns_i2c *id) if (hold_clear) { ctrl_reg &= ~CDNS_I2C_CR_HOLD; + ctrl_reg &= ~CDNS_I2C_CR_CLR_FIFO; /* * In case of Xilinx Zynq SOC, clear the HOLD bit before transfer size * register reaches '0'. This is an IP bug which causes transfer size |