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authorMarc Zyngier <maz@kernel.org>2020-02-10 01:48:50 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2020-02-10 02:47:37 +0300
commit490d332ea42780577f679f5d13598b195bff360c (patch)
tree0dc1c5203066d896975e7074e84153d684a61602 /drivers
parentd1ea35f4cdd41ae6ac5a9e1ad6a55cc901681569 (diff)
downloadlinux-490d332ea42780577f679f5d13598b195bff360c.tar.xz
irqchip/gic-v4.1: Avoid 64bit division for the sake of 32bit ARM
In order to allow the GICv4 code to link properly on 32bit ARM, make sure we don't use 64bit divisions when it isn't strictly necessary. Fixes: 4e6437f12d6e ("irqchip/gic-v4.1: Ensure L2 vPE table is allocated at RD level") Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Zenghui Yu <yuzenghui@huawei.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/irqchip/irq-gic-v3-its.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 1ee95f546cb0..83b1186ffcad 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -2444,8 +2444,8 @@ static u64 inherit_vpe_l1_table_from_rd(cpumask_t **mask)
static bool allocate_vpe_l2_table(int cpu, u32 id)
{
void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base;
- u64 val, gpsz, npg;
- unsigned int psz, esz, idx;
+ unsigned int psz, esz, idx, npg, gpsz;
+ u64 val;
struct page *page;
__le64 *table;