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authorMichael Walle <michael@walle.cc>2022-02-26 23:45:05 +0300
committerLinus Walleij <linus.walleij@linaro.org>2022-03-15 03:55:58 +0300
commit0e68328edb3227cd00681671843c3d4113083456 (patch)
tree348938e5201f0ed3db9aef6fc897997be96c95f6 /drivers
parentcd8c48b4efcfb2e71ef8a5d2208a0db5002b78bf (diff)
downloadlinux-0e68328edb3227cd00681671843c3d4113083456.tar.xz
pinctrl: microchip-sgpio: use regmap_update_bits()
Convert sgpio_clrsetbits() to use regmap_update_bits() and drop the spinlocks because regmap already takes care of the locking. Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220226204507.2511633-4-michael@walle.cc Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pinctrl/pinctrl-microchip-sgpio.c15
1 files changed, 4 insertions, 11 deletions
diff --git a/drivers/pinctrl/pinctrl-microchip-sgpio.c b/drivers/pinctrl/pinctrl-microchip-sgpio.c
index ce62bbb80dc7..c5d0663148ac 100644
--- a/drivers/pinctrl/pinctrl-microchip-sgpio.c
+++ b/drivers/pinctrl/pinctrl-microchip-sgpio.c
@@ -167,12 +167,11 @@ static void sgpio_writel(struct sgpio_priv *priv,
static inline void sgpio_clrsetbits(struct sgpio_priv *priv,
u32 rno, u32 off, u32 clear, u32 set)
{
- u32 val = sgpio_readl(priv, rno, off);
-
- val &= ~clear;
- val |= set;
+ u32 addr = sgpio_get_addr(priv, rno, off);
+ int ret;
- sgpio_writel(priv, val, rno, off);
+ ret = regmap_update_bits(priv->regs, addr, clear | set, set);
+ WARN_ONCE(ret, "error updating sgpio reg %d\n", ret);
}
static inline void sgpio_configure_bitstream(struct sgpio_priv *priv)
@@ -230,7 +229,6 @@ static void sgpio_output_set(struct sgpio_priv *priv,
int value)
{
unsigned int bit = SGPIO_SRC_BITS * addr->bit;
- unsigned long flags;
u32 clr, set;
switch (priv->properties->arch) {
@@ -250,9 +248,7 @@ static void sgpio_output_set(struct sgpio_priv *priv,
return;
}
- spin_lock_irqsave(&priv->lock, flags);
sgpio_clrsetbits(priv, REG_PORT_CONFIG, addr->port, clr, set);
- spin_unlock_irqrestore(&priv->lock, flags);
}
static int sgpio_output_get(struct sgpio_priv *priv,
@@ -615,16 +611,13 @@ static void microchip_sgpio_irq_setreg(struct irq_data *data,
struct sgpio_bank *bank = gpiochip_get_data(chip);
unsigned int gpio = irqd_to_hwirq(data);
struct sgpio_port_addr addr;
- unsigned long flags;
sgpio_pin_to_addr(bank->priv, gpio, &addr);
- spin_lock_irqsave(&bank->priv->lock, flags);
if (clear)
sgpio_clrsetbits(bank->priv, reg, addr.bit, BIT(addr.port), 0);
else
sgpio_clrsetbits(bank->priv, reg, addr.bit, 0, BIT(addr.port));
- spin_unlock_irqrestore(&bank->priv->lock, flags);
}
static void microchip_sgpio_irq_mask(struct irq_data *data)