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authorMarc Zyngier <maz@kernel.org>2022-04-09 13:16:17 +0300
committerMarc Zyngier <maz@kernel.org>2022-05-04 17:43:12 +0300
commit4053b6b43fae126bea0654493fe512d364ee9fc1 (patch)
tree2138ea27078e4a582839b6c8ab27f2a62de3f327 /drivers
parent63f13483f0689a4de20fbfd847866ab39bec736f (diff)
downloadlinux-4053b6b43fae126bea0654493fe512d364ee9fc1.tar.xz
dt-bindings: interrupt-controller: arm,gic-v3: Make the v2 compat requirements explicit
A common mistake when writing a device tree for a platform that is using GICv3 with ancient CPUs is to overlook the MMIO frames that implement the GICv2 compatibility feature, because this feature is implemented by the CPUs and not by the GIC itself. The compatibility feature itself is optional (all the modern implementations have dropped it), but is present in all the ARM Ltd implementations of the ARMv8.0 architecture (A3x, A53, A57, A72, A73), and many others from various implementers. Make it explicit that GICC, GICH and GICV are required for these CPUs. Also take this opportunity to update my email address, as people keep sending them to the wrong place... Signed-off-by: Marc Zyngier <maz@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220409101617.268796-1-maz@kernel.org
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