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authorLokesh Vutla <lokeshvutla@ti.com>2020-02-24 08:07:53 +0300
committerDaniel Lezcano <daniel.lezcano@linaro.org>2020-02-27 12:26:23 +0300
commit6ce4fcb015a1a1290ffafcf3554901b40f9322df (patch)
treef75d52ced400a814c340094331f0629895d15678 /drivers
parentad1ded9d2e3d1eb452ff58d325aadf237e187bd9 (diff)
downloadlinux-6ce4fcb015a1a1290ffafcf3554901b40f9322df.tar.xz
clocksource/drivers/timer-ti-dm: Do not update counter on updating the period
Write to trigger register(OMAP_TIMER_TRIGGER_REG) will load the value in Load register(OMAP_TIMER_LOAD_REG) into Counter register (OMAP_TIMER_COUNTER_REG). omap_dm_timer_set_load() writes into trigger register every time load register is updated. When timer is configured in pwm mode, this causes disruption in current pwm cycle, which is not expected especially when pwm is used as PPS signal for synchronized PTP clocks. So do not write into trigger register on updating the period. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200224050753.17784-3-lokeshvutla@ti.com
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clocksource/timer-ti-dm.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c
index 269a994d6a99..acc93600d351 100644
--- a/drivers/clocksource/timer-ti-dm.c
+++ b/drivers/clocksource/timer-ti-dm.c
@@ -577,7 +577,6 @@ static int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
- omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
/* Save the context */
timer->context.tclr = l;
timer->context.tldr = load;