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authorLinus Torvalds <torvalds@linux-foundation.org>2022-02-25 22:22:19 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2022-02-25 22:22:19 +0300
commit78081594971aae94d743c1af73e63fb258c04616 (patch)
tree73f98dc27c28be1facede25feffb414fbbc6b099 /drivers
parent53ab78cd6d5aba25575a7cfb95729336ba9497d8 (diff)
parent8d093e02e898b24c58788b0289e3202317a96d2a (diff)
downloadlinux-78081594971aae94d743c1af73e63fb258c04616.tar.xz
Merge tag 'ata-5.17-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata
Pull ata fixes from Damien Le Moal: "Two fixes for the pata_hpt37x driver, both from Sergey: - Fix a PCI register access using an incorrect size (8bits instead of 16bits) - Make sure to always disable the primary channel as it is unused" * tag 'ata-5.17-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata: ata: pata_hpt37x: disable primary channel on HPT371 ata: pata_hpt37x: fix PCI clock detection
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ata/pata_hpt37x.c18
1 files changed, 16 insertions, 2 deletions
diff --git a/drivers/ata/pata_hpt37x.c b/drivers/ata/pata_hpt37x.c
index 7abc7e04f656..6fa4a2faf49c 100644
--- a/drivers/ata/pata_hpt37x.c
+++ b/drivers/ata/pata_hpt37x.c
@@ -920,6 +920,20 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
pci_write_config_byte(dev, 0x5a, irqmask);
/*
+ * HPT371 chips physically have only one channel, the secondary one,
+ * but the primary channel registers do exist! Go figure...
+ * So, we manually disable the non-existing channel here
+ * (if the BIOS hasn't done this already).
+ */
+ if (dev->device == PCI_DEVICE_ID_TTI_HPT371) {
+ u8 mcr1;
+
+ pci_read_config_byte(dev, 0x50, &mcr1);
+ mcr1 &= ~0x04;
+ pci_write_config_byte(dev, 0x50, mcr1);
+ }
+
+ /*
* default to pci clock. make sure MA15/16 are set to output
* to prevent drives having problems with 40-pin cables. Needed
* for some drives such as IBM-DTLA which will not enter ready
@@ -950,14 +964,14 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
if ((freq >> 12) != 0xABCDE) {
int i;
- u8 sr;
+ u16 sr;
u32 total = 0;
dev_warn(&dev->dev, "BIOS has not set timing clocks\n");
/* This is the process the HPT371 BIOS is reported to use */
for (i = 0; i < 128; i++) {
- pci_read_config_byte(dev, 0x78, &sr);
+ pci_read_config_word(dev, 0x78, &sr);
total += sr & 0x1FF;
udelay(15);
}