diff options
author | Miquel Raynal <miquel.raynal@bootlin.com> | 2023-07-14 04:37:54 +0300 |
---|---|---|
committer | Neil Armstrong <neil.armstrong@linaro.org> | 2023-08-01 11:29:59 +0300 |
commit | a368b40836e7fc4f24dbb0fcfb9dedcde1dcaa38 (patch) | |
tree | 895c0ad20891390cd29e3a94cd249452f915279f /drivers | |
parent | 6b00e72e4bee08048379a6365251b195b8a946d1 (diff) | |
download | linux-a368b40836e7fc4f24dbb0fcfb9dedcde1dcaa38.tar.xz |
drm/panel: sitronix-st7789v: Clarify a definition
The Sitronix datasheet explains BIT(1) of the RGBCTRL register as the
DOTCLK/PCLK edge used to sample the data lines:
“0” The data is input on the positive edge of DOTCLK
“1” The data is input on the negative edge of DOTCLK
IOW, this bit implies a falling edge and not a high state. Correct the
definition to ease the comparison with the datasheet.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Sebastian Reichel <sre@kernel.org>
Tested-by: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230714013756.1546769-18-sre@kernel.org
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c index 33bdf9ee4085..3d24690e891b 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c @@ -27,7 +27,7 @@ #define ST7789V_RGBCTRL_RCM(n) (((n) & 3) << 5) #define ST7789V_RGBCTRL_VSYNC_HIGH BIT(3) #define ST7789V_RGBCTRL_HSYNC_HIGH BIT(2) -#define ST7789V_RGBCTRL_PCLK_HIGH BIT(1) +#define ST7789V_RGBCTRL_PCLK_FALLING BIT(1) #define ST7789V_RGBCTRL_DE_LOW BIT(0) #define ST7789V_RGBCTRL_VBP(n) ((n) & 0x7f) #define ST7789V_RGBCTRL_HBP(n) ((n) & 0x1f) @@ -259,7 +259,7 @@ static int st7789v_prepare(struct drm_panel *panel) if (ctx->info->mode->flags & DRM_MODE_FLAG_PHSYNC) polarity |= ST7789V_RGBCTRL_HSYNC_HIGH; if (ctx->info->bus_flags & DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE) - polarity |= ST7789V_RGBCTRL_PCLK_HIGH; + polarity |= ST7789V_RGBCTRL_PCLK_FALLING; if (ctx->info->bus_flags & DRM_BUS_FLAG_DE_LOW) polarity |= ST7789V_RGBCTRL_DE_LOW; |