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authorConor Dooley <conor.dooley@microchip.com>2024-05-08 18:46:51 +0300
committerMark Brown <broonie@kernel.org>2024-05-09 07:59:19 +0300
commitef13561d2b163ac0ae6befa53bca58a26dc3320b (patch)
tree3c5b547fea271f8eb307b12b926681cc4653fcd6 /drivers
parent52b62e7a5d4fb53ae3db3c83aee73683e5f3d2d2 (diff)
downloadlinux-ef13561d2b163ac0ae6befa53bca58a26dc3320b.tar.xz
spi: microchip-core-qspi: fix setting spi bus clock rate
Before ORing the new clock rate with the control register value read from the hardware, the existing clock rate needs to be masked off as otherwise the existing value will interfere with the new one. CC: stable@vger.kernel.org Fixes: 8596124c4c1b ("spi: microchip-core-qspi: Add support for microchip fpga qspi controllers") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240508-fox-unpiloted-b97e1535627b@spud Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/spi-microchip-core-qspi.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/spi-microchip-core-qspi.c b/drivers/spi/spi-microchip-core-qspi.c
index 03d125a71fd9..09f16471c537 100644
--- a/drivers/spi/spi-microchip-core-qspi.c
+++ b/drivers/spi/spi-microchip-core-qspi.c
@@ -283,6 +283,7 @@ static int mchp_coreqspi_setup_clock(struct mchp_coreqspi *qspi, struct spi_devi
}
control = readl_relaxed(qspi->regs + REG_CONTROL);
+ control &= ~CONTROL_CLKRATE_MASK;
control |= baud_rate_val << CONTROL_CLKRATE_SHIFT;
writel_relaxed(control, qspi->regs + REG_CONTROL);
control = readl_relaxed(qspi->regs + REG_CONTROL);