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authorSinan Kaya <okaya@codeaurora.org>2018-04-05 16:09:09 +0300
committerArnd Bergmann <arnd@arndb.de>2018-04-06 13:01:28 +0300
commit64e2c6738b4d49d69d697b5887f72ad07c206ab3 (patch)
tree089b698b6c2e94c00afaace0d6f4c0e92f654399 /include/asm-generic/io.h
parent0adb32858b0bddf4ada5f364a84ed60b196dbcda (diff)
downloadlinux-64e2c6738b4d49d69d697b5887f72ad07c206ab3.tar.xz
io: define several IO & PIO barrier types for the asm-generic version
Getting ready to harden readX()/writeX() and inX()/outX() semantics for the generic implementation. Defining two set of macros as __io_br() and __io_ar() to indicate actions to be taken before and after MMIO read. Defining two set of macros as __io_bw() and __io_aw() to indicate actions to be taken before and after MMIO write. Defining two set of macros as __io_pbw() and __io_paw() to indicate actions to be taken before and after Port IO write. Defining two set of macros as __io_pbr() and __io_par() to indicate actions to be taken before and after Port IO read. If rmb() is available for the architecture, prefer rmb() as the default implementation of __io_ar()/__io_par(). If wmb() is available for the architecture, prefer wmb() as the default implementation of __io_bw()/__io_pbw(). Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/asm-generic/io.h')
-rw-r--r--include/asm-generic/io.h44
1 files changed, 44 insertions, 0 deletions
diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
index b4531e3b2120..570433b34180 100644
--- a/include/asm-generic/io.h
+++ b/include/asm-generic/io.h
@@ -25,6 +25,50 @@
#define mmiowb() do {} while (0)
#endif
+#ifndef __io_br
+#define __io_br() barrier()
+#endif
+
+/* prevent prefetching of coherent DMA data ahead of a dma-complete */
+#ifndef __io_ar
+#ifdef rmb
+#define __io_ar() rmb()
+#else
+#define __io_ar() barrier()
+#endif
+#endif
+
+/* flush writes to coherent DMA data before possibly triggering a DMA read */
+#ifndef __io_bw
+#ifdef wmb
+#define __io_bw() wmb()
+#else
+#define __io_bw() barrier()
+#endif
+#endif
+
+/* serialize device access against a spin_unlock, usually handled there. */
+#ifndef __io_aw
+#define __io_aw() barrier()
+#endif
+
+#ifndef __io_pbw
+#define __io_pbw() __io_bw()
+#endif
+
+#ifndef __io_paw
+#define __io_paw() __io_aw()
+#endif
+
+#ifndef __io_pbr
+#define __io_pbr() __io_br()
+#endif
+
+#ifndef __io_par
+#define __io_par() __io_ar()
+#endif
+
+
/*
* __raw_{read,write}{b,w,l,q}() access memory in native endianness.
*