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author | Tianyu Lan <Tianyu.Lan@microsoft.com> | 2021-10-25 15:21:11 +0300 |
---|---|---|
committer | Wei Liu <wei.liu@kernel.org> | 2021-10-28 14:22:38 +0300 |
commit | faff44069ff538ccdfef187c4d7ec83d22dfb3a4 (patch) | |
tree | 4415d6bf06a55ca93a98e47041c00ac154ead109 /include/asm-generic | |
parent | d4dccf353db80e209f262e3973c834e6e48ba9a9 (diff) | |
download | linux-faff44069ff538ccdfef187c4d7ec83d22dfb3a4.tar.xz |
x86/hyperv: Add Write/Read MSR registers via ghcb page
Hyperv provides GHCB protocol to write Synthetic Interrupt
Controller MSR registers in Isolation VM with AMD SEV SNP
and these registers are emulated by hypervisor directly.
Hyperv requires to write SINTx MSR registers twice. First
writes MSR via GHCB page to communicate with hypervisor
and then writes wrmsr instruction to talk with paravisor
which runs in VMPL0. Guest OS ID MSR also needs to be set
via GHCB page.
Reviewed-by: Michael Kelley <mikelley@microsoft.com>
Signed-off-by: Tianyu Lan <Tianyu.Lan@microsoft.com>
Link: https://lore.kernel.org/r/20211025122116.264793-7-ltykernel@gmail.com
Signed-off-by: Wei Liu <wei.liu@kernel.org>
Diffstat (limited to 'include/asm-generic')
-rw-r--r-- | include/asm-generic/mshyperv.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-generic/mshyperv.h b/include/asm-generic/mshyperv.h index a8ac497167d2..6d3ba902ebb0 100644 --- a/include/asm-generic/mshyperv.h +++ b/include/asm-generic/mshyperv.h @@ -54,6 +54,7 @@ extern void __percpu **hyperv_pcpu_output_arg; extern u64 hv_do_hypercall(u64 control, void *inputaddr, void *outputaddr); extern u64 hv_do_fast_hypercall8(u16 control, u64 input8); +extern bool hv_isolation_type_snp(void); /* Helper functions that provide a consistent pattern for checking Hyper-V hypercall status. */ static inline int hv_result(u64 status) |