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authorMaciej W. Rozycki <macro@linux-mips.org>2005-06-23 19:57:15 +0400
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 22:31:31 +0400
commitc4559f67b73d6c34fde0faac5c6c890a2cf3527c (patch)
tree4063b3a937215684db85cc4f70eabd99cf3b8573 /include/asm-mips/atomic.h
parent69c75fb458cd81bb29e1d9580469110b00316748 (diff)
downloadlinux-c4559f67b73d6c34fde0faac5c6c890a2cf3527c.tar.xz
Always use ".set mips3" rather than select between "mips2" or "mips3"
for assembling ll/sc sequences to avoid problems with 64-bit configurations. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/atomic.h')
-rw-r--r--include/asm-mips/atomic.h20
1 files changed, 10 insertions, 10 deletions
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 80ea3fbd3ece..6202eb8a14b7 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -62,7 +62,7 @@ static __inline__ void atomic_add(int i, atomic_t * v)
unsigned long temp;
__asm__ __volatile__(
- " .set mips2 \n"
+ " .set mips3 \n"
"1: ll %0, %1 # atomic_add \n"
" addu %0, %2 \n"
" sc %0, %1 \n"
@@ -74,7 +74,7 @@ static __inline__ void atomic_add(int i, atomic_t * v)
unsigned long temp;
__asm__ __volatile__(
- " .set mips2 \n"
+ " .set mips3 \n"
"1: ll %0, %1 # atomic_add \n"
" addu %0, %2 \n"
" sc %0, %1 \n"
@@ -104,7 +104,7 @@ static __inline__ void atomic_sub(int i, atomic_t * v)
unsigned long temp;
__asm__ __volatile__(
- " .set mips2 \n"
+ " .set mips3 \n"
"1: ll %0, %1 # atomic_sub \n"
" subu %0, %2 \n"
" sc %0, %1 \n"
@@ -116,7 +116,7 @@ static __inline__ void atomic_sub(int i, atomic_t * v)
unsigned long temp;
__asm__ __volatile__(
- " .set mips2 \n"
+ " .set mips3 \n"
"1: ll %0, %1 # atomic_sub \n"
" subu %0, %2 \n"
" sc %0, %1 \n"
@@ -144,7 +144,7 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
unsigned long temp;
__asm__ __volatile__(
- " .set mips2 \n"
+ " .set mips3 \n"
"1: ll %1, %2 # atomic_add_return \n"
" addu %0, %1, %3 \n"
" sc %0, %2 \n"
@@ -159,7 +159,7 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
unsigned long temp;
__asm__ __volatile__(
- " .set mips2 \n"
+ " .set mips3 \n"
"1: ll %1, %2 # atomic_add_return \n"
" addu %0, %1, %3 \n"
" sc %0, %2 \n"
@@ -191,7 +191,7 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
unsigned long temp;
__asm__ __volatile__(
- " .set mips2 \n"
+ " .set mips3 \n"
"1: ll %1, %2 # atomic_sub_return \n"
" subu %0, %1, %3 \n"
" sc %0, %2 \n"
@@ -206,7 +206,7 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
unsigned long temp;
__asm__ __volatile__(
- " .set mips2 \n"
+ " .set mips3 \n"
"1: ll %1, %2 # atomic_sub_return \n"
" subu %0, %1, %3 \n"
" sc %0, %2 \n"
@@ -245,7 +245,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
unsigned long temp;
__asm__ __volatile__(
- " .set mips2 \n"
+ " .set mips3 \n"
"1: ll %1, %2 # atomic_sub_if_positive\n"
" subu %0, %1, %3 \n"
" bltz %0, 1f \n"
@@ -261,7 +261,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
unsigned long temp;
__asm__ __volatile__(
- " .set mips2 \n"
+ " .set mips3 \n"
"1: ll %1, %2 # atomic_sub_if_positive\n"
" subu %0, %1, %3 \n"
" bltz %0, 1f \n"