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| author | Ma Jun <Jun.Ma2@amd.com> | 2023-10-31 14:10:47 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-11-03 19:18:32 +0300 |
| commit | dbab63561b3cf6acfa3f089319dcc0e78ad31586 (patch) | |
| tree | 8076a742dd4149815edd7f34f1b9143bb2a0a481 /include/drm | |
| parent | 36e7ff5c13cb15cb7b06c76d42bb76cbf6b7ea75 (diff) | |
| download | linux-dbab63561b3cf6acfa3f089319dcc0e78ad31586.tar.xz | |
drm/amdgpu: Optimize the asic type fix code
Use a new struct array to define the asic information which
asic type needs to be fixed.
Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/drm')
| -rw-r--r-- | include/drm/amd_asic_type.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/drm/amd_asic_type.h b/include/drm/amd_asic_type.h index 90b69270f2fa..724c45e3e9a7 100644 --- a/include/drm/amd_asic_type.h +++ b/include/drm/amd_asic_type.h @@ -68,4 +68,9 @@ enum amd_asic_type { extern const char *amdgpu_asic_name[]; +struct amdgpu_asic_type_quirk { + unsigned short device; /* PCI device ID */ + u8 revision; /* revision ID */ + unsigned short type; /* real ASIC type */ +}; #endif /*__AMD_ASIC_TYPE_H__ */ |