diff options
| author | Kever Yang <kever.yang@rock-chips.com> | 2014-11-13 10:22:36 +0300 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2015-01-12 23:38:08 +0300 |
| commit | 19ce828cbc08003ec35076f704f258bbecb1f721 (patch) | |
| tree | f8aa0d3abe5aaec72142a2abd58f60947234e71b /include/dt-bindings/clock/rk3288-cru.h | |
| parent | 97bf6af1f928216fd6c5a66e8a57bfa95a659672 (diff) | |
| download | linux-19ce828cbc08003ec35076f704f258bbecb1f721.tar.xz | |
clk: rockchip: add clock ID for usbphy480m_src
There are 3 different parent clock from different usbphy,
all of them are fixed 480MHz, it is not able to auto select
by clock core to the 2nd and the 3rd parent.
For different use case for different board, we may need to
select different usbphy clock out as parent manually.
Add the clock ID for it so that we can use in dts.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'include/dt-bindings/clock/rk3288-cru.h')
| -rw-r--r-- | include/dt-bindings/clock/rk3288-cru.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h index f60ce72a2b2c..d6b59aeed553 100644 --- a/include/dt-bindings/clock/rk3288-cru.h +++ b/include/dt-bindings/clock/rk3288-cru.h @@ -80,6 +80,7 @@ #define SCLK_SDIO0_SAMPLE 119 #define SCLK_SDIO1_SAMPLE 120 #define SCLK_EMMC_SAMPLE 121 +#define SCLK_USBPHY480M_SRC 122 #define DCLK_VOP0 190 #define DCLK_VOP1 191 |