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authorGeert Uytterhoeven <geert+renesas@glider.be>2024-01-25 18:43:26 +0300
committerSasha Levin <sashal@kernel.org>2024-03-27 01:19:47 +0300
commit78dd26a1c1b3b475b5110525c26d749630109bc9 (patch)
treeaede2628002f9c0011389b29b15ea9dfdf29b413 /include/dt-bindings
parente040f1fbe9abae91b12b074cfc3bbb5367b79811 (diff)
downloadlinux-78dd26a1c1b3b475b5110525c26d749630109bc9.tar.xz
clk: renesas: r8a779g0: Correct PFC/GPIO parent clocks
[ Upstream commit abb3fa662b8f8eaed1590b0e7a4e19eda467cdd3 ] According to the R-Car V4H Series Hardware User’s Manual Rev.1.00, the parent clock of the Pin Function (PFC/GPIO) module clocks is the CP clock. Fix this by adding the missing CP clock, and correcting the PFC parents. Fixes: f2afa78d5a0c0b0b ("dt-bindings: clock: Add r8a779g0 CPG Core Clock Definitions") Fixes: 36ff366033f0dde1 ("clk: renesas: r8a779g0: Add PFC/GPIO clocks") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/5401fccd204dc90b44f0013e7f53b9eff8df8214.1706197297.git.geert+renesas@glider.be Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/r8a779g0-cpg-mssr.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/r8a779g0-cpg-mssr.h b/include/dt-bindings/clock/r8a779g0-cpg-mssr.h
index 754c54a6eb06..7850cdc62e28 100644
--- a/include/dt-bindings/clock/r8a779g0-cpg-mssr.h
+++ b/include/dt-bindings/clock/r8a779g0-cpg-mssr.h
@@ -86,5 +86,6 @@
#define R8A779G0_CLK_CPEX 74
#define R8A779G0_CLK_CBFUSA 75
#define R8A779G0_CLK_R 76
+#define R8A779G0_CLK_CP 77
#endif /* __DT_BINDINGS_CLOCK_R8A779G0_CPG_MSSR_H__ */