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authorPeter De Schrijver <pdeschrijver@nvidia.com>2017-02-28 17:37:18 +0300
committerThierry Reding <treding@nvidia.com>2017-03-20 16:06:33 +0300
commit319af7975c9ff500a30b2e6c4433c1f327283884 (patch)
tree3859ab89e50cccf6d4eb82ce2ef763718d5cfeb4 /include/dt-bindings
parentbfa34832df1fffb79c1719d4016e9cacf0f83b22 (diff)
downloadlinux-319af7975c9ff500a30b2e6c4433c1f327283884.tar.xz
clk: tegra: Define Tegra210 DMIC sync clocks
Tegra210 has 3 DMIC inputs which can be clocked from the recovered clock of several other audio inputs (eg. i2s0, i2s1, ...). To model this, we add a 3 new clocks similar to the audio* clocks which handle the same function for the I2S and SPDIF clocks. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/tegra210-car.h9
1 files changed, 8 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/tegra210-car.h b/include/dt-bindings/clock/tegra210-car.h
index e7a2578831f7..5aa10278ea1b 100644
--- a/include/dt-bindings/clock/tegra210-car.h
+++ b/include/dt-bindings/clock/tegra210-car.h
@@ -396,6 +396,13 @@
#define TEGRA210_CLK_PLL_C_UD 364
#define TEGRA210_CLK_SCLK_MUX 365
-#define TEGRA210_CLK_CLK_MAX 366
+#define TEGRA210_CLK_DMIC1_SYNC_CLK 388
+#define TEGRA210_CLK_DMIC1_SYNC_CLK_MUX 389
+#define TEGRA210_CLK_DMIC2_SYNC_CLK 390
+#define TEGRA210_CLK_DMIC2_SYNC_CLK_MUX 391
+#define TEGRA210_CLK_DMIC3_SYNC_CLK 392
+#define TEGRA210_CLK_DMIC3_SYNC_CLK_MUX 393
+
+#define TEGRA210_CLK_CLK_MAX 394
#endif /* _DT_BINDINGS_CLOCK_TEGRA210_CAR_H */