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authorJoerg Roedel <joerg.roedel@amd.com>2011-11-28 17:36:36 +0400
committerJoerg Roedel <joerg.roedel@amd.com>2011-12-14 15:09:39 +0400
commit175d6146738b3d04e1adcaa4a971a3b2b0dbd8af (patch)
tree02fea4cc4c1205db6d922be017b5bd65359ed3d7 /include/linux/amd-iommu.h
parent8736b2c331030733c5d619170dc6e9ef211a4039 (diff)
downloadlinux-175d6146738b3d04e1adcaa4a971a3b2b0dbd8af.tar.xz
iommu/amd: Add invalid_ppr callback
This callback can be used to change the PRI response code sent to a device when a PPR fault fails. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'include/linux/amd-iommu.h')
-rw-r--r--include/linux/amd-iommu.h34
1 files changed, 31 insertions, 3 deletions
diff --git a/include/linux/amd-iommu.h b/include/linux/amd-iommu.h
index 23e21e15dfab..06688c42167d 100644
--- a/include/linux/amd-iommu.h
+++ b/include/linux/amd-iommu.h
@@ -28,9 +28,6 @@ struct task_struct;
struct pci_dev;
extern int amd_iommu_detect(void);
-extern int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
- struct task_struct *task);
-extern void amd_iommu_unbind_pasid(struct pci_dev *pdev, int pasid);
/**
@@ -91,6 +88,37 @@ extern int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
*/
extern void amd_iommu_unbind_pasid(struct pci_dev *pdev, int pasid);
+/**
+ * amd_iommu_set_invalid_ppr_cb() - Register a call-back for failed
+ * PRI requests
+ * @pdev: The PCI device the call-back should be registered for
+ * @cb: The call-back function
+ *
+ * The IOMMUv2 driver invokes this call-back when it is unable to
+ * successfully handle a PRI request. The device driver can then decide
+ * which PRI response the device should see. Possible return values for
+ * the call-back are:
+ *
+ * - AMD_IOMMU_INV_PRI_RSP_SUCCESS - Send SUCCESS back to the device
+ * - AMD_IOMMU_INV_PRI_RSP_INVALID - Send INVALID back to the device
+ * - AMD_IOMMU_INV_PRI_RSP_FAIL - Send Failure back to the device,
+ * the device is required to disable
+ * PRI when it receives this response
+ *
+ * The function returns 0 on success or negative value on error.
+ */
+#define AMD_IOMMU_INV_PRI_RSP_SUCCESS 0
+#define AMD_IOMMU_INV_PRI_RSP_INVALID 1
+#define AMD_IOMMU_INV_PRI_RSP_FAIL 2
+
+typedef int (*amd_iommu_invalid_ppr_cb)(struct pci_dev *pdev,
+ int pasid,
+ unsigned long address,
+ u16);
+
+extern int amd_iommu_set_invalid_ppr_cb(struct pci_dev *pdev,
+ amd_iommu_invalid_ppr_cb cb);
+
#else
static inline int amd_iommu_detect(void) { return -ENODEV; }