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authorJoerg Roedel <joerg.roedel@amd.com>2011-12-01 15:04:58 +0400
committerJoerg Roedel <joerg.roedel@amd.com>2011-12-12 18:19:06 +0400
commit6a113ddc03bcc32d3d440dce42b445868d5be093 (patch)
tree2788087070898e12721ea94ddcde336f748ce7ff /include/linux/amd-iommu.h
parentf3572db823decfd747e6afd4c4ddfd67e8af8b6d (diff)
downloadlinux-6a113ddc03bcc32d3d440dce42b445868d5be093.tar.xz
iommu/amd: Add device errata handling
Add infrastructure for errata-handling and handle two known erratas in the IOMMUv2 code. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'include/linux/amd-iommu.h')
-rw-r--r--include/linux/amd-iommu.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/include/linux/amd-iommu.h b/include/linux/amd-iommu.h
index a6863a2dec1f..4152c3073db4 100644
--- a/include/linux/amd-iommu.h
+++ b/include/linux/amd-iommu.h
@@ -26,6 +26,24 @@
extern int amd_iommu_detect(void);
+
+/**
+ * amd_iommu_enable_device_erratum() - Enable erratum workaround for device
+ * in the IOMMUv2 driver
+ * @pdev: The PCI device the workaround is necessary for
+ * @erratum: The erratum workaround to enable
+ *
+ * Possible values for the erratum number are for now:
+ * - AMD_PRI_DEV_ERRATUM_ENABLE_RESET - Reset PRI capability when PRI
+ * is enabled
+ * - AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE - Limit number of outstanding PRI
+ * requests to one
+ */
+#define AMD_PRI_DEV_ERRATUM_ENABLE_RESET 0
+#define AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE 1
+
+extern void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum);
+
#else
static inline int amd_iommu_detect(void) { return -ENODEV; }