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authorShaokun Zhang <zhangshaokun@hisilicon.com>2019-05-28 05:16:53 +0300
committerCatalin Marinas <catalin.marinas@arm.com>2019-06-04 15:42:54 +0300
commit9a83c84c3a491cbe7fc9dea3c43e26a8e67204d2 (patch)
treebebcbd62f6bf2dc9a10aa46d6232669bac62f1ee /include/linux/cacheinfo.h
parent6dcdefcde413c1068b394eeabdfdf6a85213ebe2 (diff)
downloadlinux-9a83c84c3a491cbe7fc9dea3c43e26a8e67204d2.tar.xz
drivers: base: cacheinfo: Add variable to record max cache line size
Add coherency_max_size variable to record the maximum cache line size for different cache levels. If it is available, we will synchronize it as cache line size, otherwise we will use CTR_EL0.CWG reporting in cache_line_size() for arm64. Cc: "Rafael J. Wysocki" <rafael@kernel.org> Cc: Jeremy Linton <jeremy.linton@arm.com> Cc: Will Deacon <will.deacon@arm.com> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'include/linux/cacheinfo.h')
-rw-r--r--include/linux/cacheinfo.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h
index 70e19bc6cc9f..46b92cd61d0c 100644
--- a/include/linux/cacheinfo.h
+++ b/include/linux/cacheinfo.h
@@ -17,6 +17,8 @@ enum cache_type {
CACHE_TYPE_UNIFIED = BIT(2),
};
+extern unsigned int coherency_max_size;
+
/**
* struct cacheinfo - represent a cache leaf node
* @id: This cache's id. It is unique among caches with the same (type, level).