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authorRobin Murphy <robin.murphy@arm.com>2019-10-25 21:08:36 +0300
committerWill Deacon <will@kernel.org>2019-11-04 22:59:30 +0300
commit205577ab6f7ade6185f764ed78fb6875dca40205 (patch)
tree3dc33876b1194b7d1cf1a384e7216659a6d95344 /include/linux/io-pgtable.h
parent5fb190b0b52552de880536d4f409c4300c25e3d4 (diff)
downloadlinux-205577ab6f7ade6185f764ed78fb6875dca40205.tar.xz
iommu/io-pgtable-arm: Rationalise MAIR handling
Between VMSAv8-64 and the various 32-bit formats, there is either one 64-bit MAIR or a pair of 32-bit MAIR0/MAIR1 or NMRR/PMRR registers. As such, keeping two 64-bit values in io_pgtable_cfg has always been overkill. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'include/linux/io-pgtable.h')
-rw-r--r--include/linux/io-pgtable.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/io-pgtable.h b/include/linux/io-pgtable.h
index ec7a13405f10..ee21eedafe98 100644
--- a/include/linux/io-pgtable.h
+++ b/include/linux/io-pgtable.h
@@ -102,7 +102,7 @@ struct io_pgtable_cfg {
struct {
u64 ttbr[2];
u64 tcr;
- u64 mair[2];
+ u64 mair;
} arm_lpae_s1_cfg;
struct {