diff options
| author | Doug Ledford <dledford@redhat.com> | 2019-08-26 17:28:05 +0300 |
|---|---|---|
| committer | Doug Ledford <dledford@redhat.com> | 2019-08-26 17:28:05 +0300 |
| commit | 973ca46d5c28b6f6aafe7522392570f5e01a474f (patch) | |
| tree | d2d9e4b9919a5006bddaf05673e46faa5d006e41 /include/linux/mlx5 | |
| parent | 868df536f5e84672c3e002b949e0e44f97cb0f09 (diff) | |
| parent | e6806e9a63a759e445383915bb9d2ec85a90aebf (diff) | |
| download | linux-973ca46d5c28b6f6aafe7522392570f5e01a474f.tar.xz | |
Merge remote-tracking branch 'mlx5-next/mlx5-next' into for-next
Bring in the lastest mlx5-next branch as the RDMA RX RoCE Steering
Support patch series requires it (first two patches are in mlx5-next,
final patch in RDMA tree).
Signed-off-by: Doug Ledford <dledford@redhat.com>
Diffstat (limited to 'include/linux/mlx5')
| -rw-r--r-- | include/linux/mlx5/fs.h | 1 | ||||
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 18 |
2 files changed, 15 insertions, 4 deletions
diff --git a/include/linux/mlx5/fs.h b/include/linux/mlx5/fs.h index f049af3f3cd8..f16fe96c9acc 100644 --- a/include/linux/mlx5/fs.h +++ b/include/linux/mlx5/fs.h @@ -75,6 +75,7 @@ enum mlx5_flow_namespace_type { MLX5_FLOW_NAMESPACE_SNIFFER_TX, MLX5_FLOW_NAMESPACE_EGRESS, MLX5_FLOW_NAMESPACE_RDMA_RX, + MLX5_FLOW_NAMESPACE_RDMA_RX_KERNEL, }; enum { diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index f648d1645287..3a5c9965b7a2 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -808,7 +808,9 @@ struct mlx5_ifc_per_protocol_networking_offload_caps_bits { u8 swp_csum[0x1]; u8 swp_lso[0x1]; u8 cqe_checksum_full[0x1]; - u8 reserved_at_24[0xc]; + u8 reserved_at_24[0x5]; + u8 tunnel_stateless_ip_over_ip[0x1]; + u8 reserved_at_2a[0x6]; u8 max_vxlan_udp_ports[0x8]; u8 reserved_at_38[0x6]; u8 max_geneve_opt_len[0x1]; @@ -1116,7 +1118,9 @@ struct mlx5_ifc_cmd_hca_cap_bits { u8 cache_line_128byte[0x1]; u8 reserved_at_165[0x4]; u8 rts2rts_qp_counters_set_id[0x1]; - u8 reserved_at_16a[0x5]; + u8 reserved_at_16a[0x2]; + u8 vnic_env_int_rq_oob[0x1]; + u8 reserved_at_16d[0x2]; u8 qcam_reg[0x1]; u8 gid_table_size[0x10]; @@ -1245,7 +1249,9 @@ struct mlx5_ifc_cmd_hca_cap_bits { u8 reserved_at_263[0x8]; u8 log_bf_reg_size[0x5]; - u8 reserved_at_270[0xb]; + u8 reserved_at_270[0x8]; + u8 lag_tx_port_affinity[0x1]; + u8 reserved_at_279[0x2]; u8 lag_master[0x1]; u8 num_lag_ports[0x4]; @@ -2772,7 +2778,11 @@ struct mlx5_ifc_vnic_diagnostic_statistics_bits { u8 transmit_discard_vport_down[0x40]; - u8 reserved_at_140[0xec0]; + u8 reserved_at_140[0xa0]; + + u8 internal_rq_out_of_buffer[0x20]; + + u8 reserved_at_200[0xe00]; }; struct mlx5_ifc_traffic_counter_bits { |