summaryrefslogtreecommitdiff
path: root/include/linux/perf
diff options
context:
space:
mode:
authorAtish Patra <atish.patra@wdc.com>2022-02-19 03:46:57 +0300
committerPalmer Dabbelt <palmer@rivosinc.com>2022-03-22 00:58:33 +0300
commite9991434596f5373dfd75857b445eb92a9253c56 (patch)
treeb39e3c364207841faf568f86332c8a087b8fe622 /include/linux/perf
parent90beae5185c260074db409241247630036cf93a0 (diff)
downloadlinux-e9991434596f5373dfd75857b445eb92a9253c56.tar.xz
RISC-V: Add perf platform driver based on SBI PMU extension
RISC-V SBI specification added a PMU extension that allows to configure start/stop any pmu counter. The RISC-V perf can use most of the generic perf features except interrupt overflow and event filtering based on privilege mode which will be added in future. It also allows to monitor a handful of firmware counters that can provide insights into firmware activity during a performance analysis. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Atish Patra <atishp@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'include/linux/perf')
-rw-r--r--include/linux/perf/riscv_pmu.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/include/linux/perf/riscv_pmu.h b/include/linux/perf/riscv_pmu.h
index 9140c491fc54..0f226948c0ca 100644
--- a/include/linux/perf/riscv_pmu.h
+++ b/include/linux/perf/riscv_pmu.h
@@ -31,8 +31,10 @@ struct cpu_hw_events {
int n_events;
/* currently enabled events */
struct perf_event *events[RISCV_MAX_COUNTERS];
- /* currently enabled counters */
- DECLARE_BITMAP(used_event_ctrs, RISCV_MAX_COUNTERS);
+ /* currently enabled hardware counters */
+ DECLARE_BITMAP(used_hw_ctrs, RISCV_MAX_COUNTERS);
+ /* currently enabled firmware counters */
+ DECLARE_BITMAP(used_fw_ctrs, RISCV_MAX_COUNTERS);
};
struct riscv_pmu {