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| author | Dustin L. Howett <dustin@howett.net> | 2022-02-17 19:59:30 +0300 |
|---|---|---|
| committer | Tzung-Bi Shih <tzungbi@kernel.org> | 2022-05-03 08:43:21 +0300 |
| commit | c9bc1a0ef9f613a7bc1adfff4c67dc5e5d7d1709 (patch) | |
| tree | c408119dc280f4c9001bd1dda97d7ab967403170 /include/linux/platform_data/cros_ec_commands.h | |
| parent | 6a5d778edaa39dfa07a61d487a70f2deb1017c0f (diff) | |
| download | linux-c9bc1a0ef9f613a7bc1adfff4c67dc5e5d7d1709.tar.xz | |
platform/chrome: cros_ec_lpcs: reserve the MEC LPC I/O ports first
Some ChromeOS EC devices (such as the Framework Laptop) only map I/O
ports 0x800-0x807. Making the larger reservation required by the non-MEC
LPC (the 0xFF ports for the memory map, and the 0xFF ports for the
parameter region) is non-viable on these devices.
Since we probe the MEC EC first, we can get away with a smaller
reservation that covers the MEC EC ports. If we fall back to classic
LPC, we can grow the reservation to cover the memory map and the
parameter region.
cros_ec_lpc_probe also interacted with I/O ports 0x800-0x807 without a
reservation. Restructuring the code to request the MEC LPC region first
obviates the need to do so.
Signed-off-by: Dustin L. Howett <dustin@howett.net>
Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org>
Link: https://lore.kernel.org/r/20220217165930.15081-3-dustin@howett.net
Diffstat (limited to 'include/linux/platform_data/cros_ec_commands.h')
| -rw-r--r-- | include/linux/platform_data/cros_ec_commands.h | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h index c23554531961..8cfa8cfca77e 100644 --- a/include/linux/platform_data/cros_ec_commands.h +++ b/include/linux/platform_data/cros_ec_commands.h @@ -51,10 +51,14 @@ /* * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff * and they tell the kernel that so we have to think of it as two parts. + * + * Other BIOSes report only the I/O port region spanned by the Microchip + * MEC series EC; an attempt to address a larger region may fail. */ -#define EC_HOST_CMD_REGION0 0x800 -#define EC_HOST_CMD_REGION1 0x880 -#define EC_HOST_CMD_REGION_SIZE 0x80 +#define EC_HOST_CMD_REGION0 0x800 +#define EC_HOST_CMD_REGION1 0x880 +#define EC_HOST_CMD_REGION_SIZE 0x80 +#define EC_HOST_CMD_MEC_REGION_SIZE 0x8 /* EC command register bit functions */ #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */ |