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authorGeert Uytterhoeven <geert+renesas@glider.be>2015-04-30 19:21:29 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-05-10 20:06:38 +0300
commitd94a0a3857987c76c37a8095977fe554799ab69d (patch)
tree56466ae52be0788e62a5770eb0ce2611099f43a5 /include/linux/serial_sci.h
parent31f90796c66876ea1894ea93e394b264e69dfdfc (diff)
downloadlinux-d94a0a3857987c76c37a8095977fe554799ab69d.tar.xz
serial: sh-sci: Standardize on using the BIT() macro to define register bits
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/linux/serial_sci.h')
-rw-r--r--include/linux/serial_sci.h19
1 files changed, 10 insertions, 9 deletions
diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
index 395fceb8c060..7c536ac5be05 100644
--- a/include/linux/serial_sci.h
+++ b/include/linux/serial_sci.h
@@ -1,6 +1,7 @@
#ifndef __LINUX_SERIAL_SCI_H
#define __LINUX_SERIAL_SCI_H
+#include <linux/bitops.h>
#include <linux/serial_core.h>
#include <linux/sh_dma.h>
@@ -11,14 +12,14 @@
#define SCIx_NOT_SUPPORTED (-1)
/* Serial Control Register (@ = not supported by all parts) */
-#define SCSCR_TIE (1 << 7) /* Transmit Interrupt Enable */
-#define SCSCR_RIE (1 << 6) /* Receive Interrupt Enable */
-#define SCSCR_TE (1 << 5) /* Transmit Enable */
-#define SCSCR_RE (1 << 4) /* Receive Enable */
-#define SCSCR_REIE (1 << 3) /* Receive Error Interrupt Enable @ */
-#define SCSCR_TOIE (1 << 2) /* Timeout Interrupt Enable @ */
-#define SCSCR_CKE1 (1 << 1) /* Clock Enable 1 */
-#define SCSCR_CKE0 (1 << 0) /* Clock Enable 0 */
+#define SCSCR_TIE BIT(7) /* Transmit Interrupt Enable */
+#define SCSCR_RIE BIT(6) /* Receive Interrupt Enable */
+#define SCSCR_TE BIT(5) /* Transmit Enable */
+#define SCSCR_RE BIT(4) /* Receive Enable */
+#define SCSCR_REIE BIT(3) /* Receive Error Interrupt Enable @ */
+#define SCSCR_TOIE BIT(2) /* Timeout Interrupt Enable @ */
+#define SCSCR_CKE1 BIT(1) /* Clock Enable 1 */
+#define SCSCR_CKE0 BIT(0) /* Clock Enable 0 */
enum {
@@ -48,7 +49,7 @@ struct plat_sci_port_ops {
/*
* Port-specific capabilities
*/
-#define SCIx_HAVE_RTSCTS (1 << 0)
+#define SCIx_HAVE_RTSCTS BIT(0)
/*
* Platform device specific platform_data struct