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authorPaul Mundt <lethal@linux-sh.org>2012-05-25 11:34:48 +0400
committerPaul Mundt <lethal@linux-sh.org>2012-05-25 11:34:48 +0400
commit764f4e4e33d18cde4dcaf8a0d860b749c6d6d08b (patch)
tree1e498ea454a2392b557a0f562170946838dece39 /include/linux/sh_clk.h
parent0fa22168e00106797f28b2655aaefd0d16a6e67b (diff)
downloadlinux-764f4e4e33d18cde4dcaf8a0d860b749c6d6d08b.tar.xz
sh: clkfwk: Use shared sh_clk_div_enable/disable().
This introduces a new flag for clocks that need to have their divisor ratio set back to their initial mask at disable time to prevent interactivity problems with the clock stop bit (presently div6 only). With this in place it's possible to handle the corner case on top of the div4 op without any particular need for leaving things split out. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/linux/sh_clk.h')
-rw-r--r--include/linux/sh_clk.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h
index 35a04f19fb53..50910913b268 100644
--- a/include/linux/sh_clk.h
+++ b/include/linux/sh_clk.h
@@ -69,6 +69,8 @@ struct clk {
#define CLK_ENABLE_REG_16BIT BIT(2)
#define CLK_ENABLE_REG_8BIT BIT(3)
+#define CLK_MASK_DIV_ON_DISABLE BIT(4)
+
#define CLK_ENABLE_REG_MASK (CLK_ENABLE_REG_32BIT | \
CLK_ENABLE_REG_16BIT | \
CLK_ENABLE_REG_8BIT)
@@ -173,7 +175,7 @@ int sh_clk_div4_reparent_register(struct clk *clks, int nr,
{ \
.enable_reg = (void __iomem *)_reg, \
.enable_bit = 0, /* unused */ \
- .flags = _flags, \
+ .flags = _flags | CLK_MASK_DIV_ON_DISABLE, \
.div_mask = SH_CLK_DIV6_MSK, \
.parent_table = _parents, \
.parent_num = _num_parents, \
@@ -187,7 +189,7 @@ int sh_clk_div4_reparent_register(struct clk *clks, int nr,
.enable_reg = (void __iomem *)_reg, \
.enable_bit = 0, /* unused */ \
.div_mask = SH_CLK_DIV6_MSK, \
- .flags = _flags, \
+ .flags = _flags | CLK_MASK_DIV_ON_DISABLE, \
}
int sh_clk_div6_register(struct clk *clks, int nr);