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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2024-04-24 04:39:29 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-05-30 10:49:45 +0300 |
| commit | f494a03ad92b229355b6bd08bf8db144bc3ebcc8 (patch) | |
| tree | d2004da3083ab23c1db5284f494eae1ec32b1f10 /lib | |
| parent | 57977d414bf7a18c2beb7d4f3cbc2ea776f3edde (diff) | |
| download | linux-f494a03ad92b229355b6bd08bf8db144bc3ebcc8.tar.xz | |
clk: qcom: dispcc-sm8450: fix DisplayPort clocks
[ Upstream commit e801038a02ce1e8c652a0b668dd233a4ee48aeb7 ]
On SM8450 DisplayPort link clocks use frequency tables inherited from
the vendor kernel, it is not applicable in the upstream kernel. Drop
frequency tables and use clk_byte2_ops for those clocks.
This fixes frequency selection in the OPP core (which otherwise attempts
to use invalid 810 KHz as DP link rate), also fixing the following
message:
msm-dp-display ae90000.displayport-controller: _opp_config_clk_single: failed to set clock rate: -22
Fixes: 16fb89f92ec4 ("clk: qcom: Add support for Display Clock Controller on SM8450")
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240424-dispcc-dp-clocks-v2-1-b44038f3fa96@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'lib')
0 files changed, 0 insertions, 0 deletions