diff options
| author | Lukasz Majewski <lukma@denx.de> | 2023-07-27 11:13:42 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-09-13 10:42:23 +0300 |
| commit | 94515e9aa84c0458c8825ca661b61381146ba599 (patch) | |
| tree | 28ed064113e06a2f7580725eee58af2dda7cfaad /net | |
| parent | 848477e08391d4604abcf428fdd6fa0aaaa20089 (diff) | |
| download | linux-94515e9aa84c0458c8825ca661b61381146ba599.tar.xz | |
net: dsa: microchip: KSZ9477 register regmap alignment to 32 bit boundaries
[ Upstream commit 8d7ae22ae9f8c8a4407f8e993df64440bdbd0cee ]
The commit (SHA1: 5c844d57aa7894154e49cf2fc648bfe2f1aefc1c) provided code
to apply "Module 6: Certain PHY registers must be written as pairs instead
of singly" errata for KSZ9477 as this chip for certain PHY registers
(0xN120 to 0xN13F, N=1,2,3,4,5) must be accesses as 32 bit words instead
of 16 or 8 bit access.
Otherwise, adjacent registers (no matter if reserved or not) are
overwritten with 0x0.
Without this patch some registers (e.g. 0x113c or 0x1134) required for 32
bit access are out of valid regmap ranges.
As a result, following error is observed and KSZ9477 is not properly
configured:
ksz-switch spi1.0: can't rmw 32bit reg 0x113c: -EIO
ksz-switch spi1.0: can't rmw 32bit reg 0x1134: -EIO
ksz-switch spi1.0 lan1 (uninitialized): failed to connect to PHY: -EIO
ksz-switch spi1.0 lan1 (uninitialized): error -5 setting up PHY for tree 0, switch 0, port 0
The solution is to modify regmap_reg_range to allow accesses with 4 bytes
boundaries.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Horman <horms@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'net')
0 files changed, 0 insertions, 0 deletions