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| author | Mukunda, Vijendar <Vijendar.Mukunda@amd.com> | 2018-05-08 07:47:47 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2018-05-21 18:18:29 +0300 |
| commit | e188c525b9e193bc5aec97c824bc0cd1a9cb6aeb (patch) | |
| tree | a6cd40a8188c1ed4ce5d71fca04297c16a019dcc /sound/soc/amd/acp.h | |
| parent | a4ae3af59bd58514b5417d7d802a37e82bfcfd8f (diff) | |
| download | linux-e188c525b9e193bc5aec97c824bc0cd1a9cb6aeb.tar.xz | |
ASoC: amd: pte offset related dma driver changes
Added pte offset variable in audio_substream_data structure.
Added Stoney related PTE offset macros in acp header file.
Modified hw_params callback to assign the pte offset value
based on asic_type.
PTE Offset macros used to calculate no of PTE entries
need to be programmed when memory allocated for audio buffer.
Depending upon allocated audio buffer size, PTE offset values
will change.
Compared to CZ, Stoney has SRAM memory limitation i.e 48k
It is required to define separate PTE Offset macros for
Stoney.
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/amd/acp.h')
| -rw-r--r-- | sound/soc/amd/acp.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/sound/soc/amd/acp.h b/sound/soc/amd/acp.h index 82470bc710f0..2f48d1d25243 100644 --- a/sound/soc/amd/acp.h +++ b/sound/soc/amd/acp.h @@ -10,6 +10,10 @@ #define ACP_PLAYBACK_PTE_OFFSET 10 #define ACP_CAPTURE_PTE_OFFSET 0 +/* Playback and Capture Offset for Stoney */ +#define ACP_ST_PLAYBACK_PTE_OFFSET 0x04 +#define ACP_ST_CAPTURE_PTE_OFFSET 0x00 + #define ACP_GARLIC_CNTL_DEFAULT 0x00000FB4 #define ACP_ONION_CNTL_DEFAULT 0x00000FB4 @@ -90,6 +94,7 @@ struct audio_substream_data { u16 destination; u16 dma_dscr_idx_1; u16 dma_dscr_idx_2; + u32 pte_offset; u32 byte_cnt_high_reg_offset; u32 byte_cnt_low_reg_offset; uint64_t size; |