diff options
author | V sujith kumar Reddy <Vsujithkumar.Reddy@amd.com> | 2022-07-07 19:11:42 +0300 |
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committer | Mark Brown <broonie@kernel.org> | 2022-07-08 20:53:15 +0300 |
commit | e8a33a94078560df73761f6d6147a25bda07605c (patch) | |
tree | 1687452a4c313076826448674ef77e3cf736a4d4 /sound/soc/amd/acp/amd.h | |
parent | b24484c18b1089f9dd1ef7901b05a85e315e9f41 (diff) | |
download | linux-e8a33a94078560df73761f6d6147a25bda07605c.tar.xz |
ASoC: amd: acp: Add legacy audio driver support for Rembrandt platform
Add i2s and dmic support for Rembrandt platform,
Add machine support for nau8825, max98360 and rt5682s,rt1019 codec
in legacy driver for rembrandt platform.
Here codec is in a slave mode.
Signed-off-by: V sujith kumar Reddy <Vsujithkumar.Reddy@amd.com>
Link: https://lore.kernel.org/r/20220707161142.491034-4-Vsujithkumar.Reddy@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/amd/acp/amd.h')
-rw-r--r-- | sound/soc/amd/acp/amd.h | 62 |
1 files changed, 61 insertions, 1 deletions
diff --git a/sound/soc/amd/acp/amd.h b/sound/soc/amd/acp/amd.h index 186cb8b26175..af9603724a68 100644 --- a/sound/soc/amd/acp/amd.h +++ b/sound/soc/amd/acp/amd.h @@ -19,10 +19,12 @@ #include "chip_offset_byte.h" #define ACP3X_DEV 3 +#define ACP6X_DEV 6 #define I2S_SP_INSTANCE 0x00 #define I2S_BT_INSTANCE 0x01 #define DMIC_INSTANCE 0x02 +#define I2S_HS_INSTANCE 0x03 #define MEM_WINDOW_START 0x4080000 @@ -38,23 +40,31 @@ #define I2S_TX_THRESHOLD(base) THRESHOLD(8, base) #define BT_TX_THRESHOLD(base) THRESHOLD(6, base) #define BT_RX_THRESHOLD(base) THRESHOLD(5, base) +#define HS_TX_THRESHOLD(base) THRESHOLD(4, base) +#define HS_RX_THRESHOLD(base) THRESHOLD(3, base) #define ACP_SRAM_SP_PB_PTE_OFFSET 0x0 #define ACP_SRAM_SP_CP_PTE_OFFSET 0x100 #define ACP_SRAM_BT_PB_PTE_OFFSET 0x200 #define ACP_SRAM_BT_CP_PTE_OFFSET 0x300 #define ACP_SRAM_PDM_PTE_OFFSET 0x400 +#define ACP_SRAM_HS_PB_PTE_OFFSET 0x500 +#define ACP_SRAM_HS_CP_PTE_OFFSET 0x600 #define PAGE_SIZE_4K_ENABLE 0x2 #define I2S_SP_TX_MEM_WINDOW_START 0x4000000 #define I2S_SP_RX_MEM_WINDOW_START 0x4020000 #define I2S_BT_TX_MEM_WINDOW_START 0x4040000 #define I2S_BT_RX_MEM_WINDOW_START 0x4060000 +#define I2S_HS_TX_MEM_WINDOW_START 0x40A0000 +#define I2S_HS_RX_MEM_WINDOW_START 0x40C0000 #define SP_PB_FIFO_ADDR_OFFSET 0x500 #define SP_CAPT_FIFO_ADDR_OFFSET 0x700 #define BT_PB_FIFO_ADDR_OFFSET 0x900 #define BT_CAPT_FIFO_ADDR_OFFSET 0xB00 +#define HS_PB_FIFO_ADDR_OFFSET 0xD00 +#define HS_CAPT_FIFO_ADDR_OFFSET 0xF00 #define PLAYBACK_MIN_NUM_PERIODS 2 #define PLAYBACK_MAX_NUM_PERIODS 8 #define PLAYBACK_MAX_PERIOD_SIZE 8192 @@ -72,7 +82,7 @@ #define ACP3x_ITER_IRER_SAMP_LEN_MASK 0x38 -#define ACP_MAX_STREAM 6 +#define ACP_MAX_STREAM 8 struct acp_chip_info { char *name; /* Platform name */ @@ -95,6 +105,7 @@ struct acp_resource { int offset; int no_of_ctrls; int irqp_used; + bool soc_mclk; u32 irq_reg_offset; u32 i2s_pin_cfg_offset; int i2s_mode; @@ -117,9 +128,23 @@ struct acp_dev_data { struct snd_soc_acpi_mach *machines; struct platform_device *mach_dev; + u32 bclk_div; + u32 lrclk_div; + struct acp_resource *rsrc; }; +union acp_i2stdm_mstrclkgen { + struct { + u32 i2stdm_master_mode : 1; + u32 i2stdm_format_mode : 1; + u32 i2stdm_lrclk_div_val : 9; + u32 i2stdm_bclk_div_val : 11; + u32:10; + } bitfields, bits; + u32 u32_all; +}; + extern const struct snd_soc_dai_ops asoc_acp_cpu_dai_ops; extern const struct snd_soc_dai_ops acp_dmic_dai_ops; @@ -146,6 +171,10 @@ static inline u64 acp_get_byte_count(struct acp_dev_data *adata, int dai_id, int high = readl(adata->acp_base + ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH); low = readl(adata->acp_base + ACP_I2S_TX_LINEARPOSITIONCNTR_LOW); break; + case I2S_HS_INSTANCE: + high = readl(adata->acp_base + ACP_HS_TX_LINEARPOSITIONCNTR_HIGH); + low = readl(adata->acp_base + ACP_HS_TX_LINEARPOSITIONCNTR_LOW); + break; default: dev_err(adata->dev, "Invalid dai id %x\n", dai_id); return -EINVAL; @@ -160,6 +189,10 @@ static inline u64 acp_get_byte_count(struct acp_dev_data *adata, int dai_id, int high = readl(adata->acp_base + ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH); low = readl(adata->acp_base + ACP_I2S_RX_LINEARPOSITIONCNTR_LOW); break; + case I2S_HS_INSTANCE: + high = readl(adata->acp_base + ACP_HS_RX_LINEARPOSITIONCNTR_HIGH); + low = readl(adata->acp_base + ACP_HS_RX_LINEARPOSITIONCNTR_LOW); + break; case DMIC_INSTANCE: high = readl(adata->acp_base + ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH); low = readl(adata->acp_base + ACP_WOV_RX_LINEARPOSITIONCNTR_LOW); @@ -175,4 +208,31 @@ static inline u64 acp_get_byte_count(struct acp_dev_data *adata, int dai_id, int return byte_count; } +static inline void acp_set_i2s_clk(struct acp_dev_data *adata, int dai_id) +{ + union acp_i2stdm_mstrclkgen mclkgen; + u32 master_reg; + + switch (dai_id) { + case I2S_SP_INSTANCE: + master_reg = ACP_I2STDM0_MSTRCLKGEN; + break; + case I2S_BT_INSTANCE: + master_reg = ACP_I2STDM1_MSTRCLKGEN; + break; + case I2S_HS_INSTANCE: + master_reg = ACP_I2STDM2_MSTRCLKGEN; + break; + default: + master_reg = ACP_I2STDM0_MSTRCLKGEN; + break; + } + + mclkgen.bits.i2stdm_master_mode = 0x1; + mclkgen.bits.i2stdm_format_mode = 0x00; + + mclkgen.bits.i2stdm_bclk_div_val = adata->bclk_div; + mclkgen.bits.i2stdm_lrclk_div_val = adata->lrclk_div; + writel(mclkgen.u32_all, adata->acp_base + master_reg); +} #endif |