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authorRichard Fitzgerald <rf@opensource.cirrus.com>2021-03-06 21:55:51 +0300
committerMark Brown <broonie@kernel.org>2021-03-10 16:14:29 +0300
commit0ea23660c7170124fc06ec363b4d2adfa350cf2f (patch)
tree95f6ee9b83bf6f0394a27d5aed7a944c464d0541 /sound/soc/codecs/cs42l42.c
parent2cdba9b045c745139ae56227d71f261f5d3c6fae (diff)
downloadlinux-0ea23660c7170124fc06ec363b4d2adfa350cf2f.tar.xz
ASoC: cs42l42: Wait at least 150us after writing SCLK_PRESENT
There must be a delay of at least 150us after writing SCLK_PRESENT before issuing another I2C write. This is done using struct reg_sequence because it can specify a delay after the write and the whole sequence is written atomically. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Signed-off-by: Lucas Tanure <tanureal@opensource.cirrus.com> Link: https://lore.kernel.org/r/20210306185553.62053-14-tanureal@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/cs42l42.c')
-rw-r--r--sound/soc/codecs/cs42l42.c27
1 files changed, 22 insertions, 5 deletions
diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c
index 68b7ed71ad54..08718fd10fb9 100644
--- a/sound/soc/codecs/cs42l42.c
+++ b/sound/soc/codecs/cs42l42.c
@@ -549,6 +549,24 @@ static const struct snd_soc_component_driver soc_component_dev_cs42l42 = {
.non_legacy_dai_naming = 1,
};
+/* Switch to SCLK. Atomic delay after the write to allow the switch to complete. */
+static const struct reg_sequence cs42l42_to_sclk_seq[] = {
+ {
+ .reg = CS42L42_OSC_SWITCH,
+ .def = CS42L42_SCLK_PRESENT_MASK,
+ .delay_us = CS42L42_CLOCK_SWITCH_DELAY_US,
+ },
+};
+
+/* Switch to OSC. Atomic delay after the write to allow the switch to complete. */
+static const struct reg_sequence cs42l42_to_osc_seq[] = {
+ {
+ .reg = CS42L42_OSC_SWITCH,
+ .def = 0,
+ .delay_us = CS42L42_CLOCK_SWITCH_DELAY_US,
+ },
+};
+
struct cs42l42_pll_params {
u32 sclk;
u8 mclk_div;
@@ -861,8 +879,8 @@ static int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
* SCLK must remain running until after this clock switch.
* Without a source of clock the I2C bus doesn't work.
*/
- snd_soc_component_update_bits(component, CS42L42_OSC_SWITCH,
- CS42L42_SCLK_PRESENT_MASK, 0);
+ regmap_multi_reg_write(cs42l42->regmap, cs42l42_to_osc_seq,
+ ARRAY_SIZE(cs42l42_to_osc_seq));
snd_soc_component_update_bits(component, CS42L42_PLL_CTL1,
CS42L42_PLL_START_MASK, 0);
}
@@ -873,9 +891,8 @@ static int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
CS42L42_PLL_START_MASK, 1);
/* Mark SCLK as present, turn off internal oscillator */
- snd_soc_component_update_bits(component, CS42L42_OSC_SWITCH,
- CS42L42_SCLK_PRESENT_MASK,
- CS42L42_SCLK_PRESENT_MASK);
+ regmap_multi_reg_write(cs42l42->regmap, cs42l42_to_sclk_seq,
+ ARRAY_SIZE(cs42l42_to_sclk_seq));
}
cs42l42->stream_use |= 1 << stream;