diff options
| author | Curtis Malainey <cujomalainey@chromium.org> | 2019-11-06 04:13:35 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-11-11 16:02:06 +0300 |
| commit | ba0b3a977ecf525231d36f2d9f3a6ea05c35090a (patch) | |
| tree | 341e7425717c32d3e09685b9a54b07732efbb925 /sound/soc/codecs/rt5677.c | |
| parent | 55229597a94531726878229ccfcd3fe4ec572dc3 (diff) | |
| download | linux-ba0b3a977ecf525231d36f2d9f3a6ea05c35090a.tar.xz | |
ASoC: rt5677: Set ADC clock to use PLL and enable ASRC
Use the PLL to kept the correct 24M clock rate so frequency shift does
not occur when using the DSP VAD.
Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
Link: https://lore.kernel.org/r/20191106011335.223061-11-cujomalainey@chromium.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/rt5677.c')
| -rw-r--r-- | sound/soc/codecs/rt5677.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c index a65d1554366d..0e7773584145 100644 --- a/sound/soc/codecs/rt5677.c +++ b/sound/soc/codecs/rt5677.c @@ -5046,6 +5046,11 @@ static const struct snd_soc_dai_ops rt5677_aif_dai_ops = { .set_tdm_slot = rt5677_set_tdm_slot, }; +static const struct snd_soc_dai_ops rt5677_dsp_dai_ops = { + .set_sysclk = rt5677_set_dai_sysclk, + .set_pll = rt5677_set_dai_pll, +}; + static struct snd_soc_dai_driver rt5677_dai[] = { { .name = "rt5677-aif1", @@ -5152,6 +5157,7 @@ static struct snd_soc_dai_driver rt5677_dai[] = { .rates = SNDRV_PCM_RATE_16000, .formats = SNDRV_PCM_FMTBIT_S16_LE, }, + .ops = &rt5677_dsp_dai_ops, }, }; |