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authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2020-06-16 08:21:29 +0300
committerMark Brown <broonie@kernel.org>2020-06-22 17:13:45 +0300
commit6d75dfc3e86500eda78fc2ddc6e2cdb52b9e2a1a (patch)
treeab9279d7b271235093e7f9868e2c3b83567c7920 /sound/soc/codecs/wm8994.c
parente896c1ed67ef5a4df301d88ea77835e1eb4cf102 (diff)
downloadlinux-6d75dfc3e86500eda78fc2ddc6e2cdb52b9e2a1a.tar.xz
ASoC: codecs: wm*: rename to snd_soc_component_read()
We need to use snd_soc_component_read() instead of snd_soc_component_read32() This patch renames _read32() to _read() Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87eeqf4mcl.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/wm8994.c')
-rw-r--r--sound/soc/codecs/wm8994.c60
1 files changed, 30 insertions, 30 deletions
diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c
index 55d0b9be6ff0..5e1ce243feb1 100644
--- a/sound/soc/codecs/wm8994.c
+++ b/sound/soc/codecs/wm8994.c
@@ -113,7 +113,7 @@ static void wm8958_micd_set_rate(struct snd_soc_component *component)
idle = !wm8994->jack_mic;
- sysclk = snd_soc_component_read32(component, WM8994_CLOCKING_1);
+ sysclk = snd_soc_component_read(component, WM8994_CLOCKING_1);
if (sysclk & WM8994_SYSCLK_SRC)
sysclk = wm8994->aifclk[1];
else
@@ -247,7 +247,7 @@ static int check_clk_sys(struct snd_soc_dapm_widget *source,
struct snd_soc_dapm_widget *sink)
{
struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
- int reg = snd_soc_component_read32(component, WM8994_CLOCKING_1);
+ int reg = snd_soc_component_read(component, WM8994_CLOCKING_1);
const char *clk;
/* Check what we're currently using for CLK_SYS */
@@ -305,7 +305,7 @@ static int wm8994_put_drc_sw(struct snd_kcontrol *kcontrol,
else
mask = WM8994_AIF1DAC1_DRC_ENA_MASK;
- ret = snd_soc_component_read32(component, mc->reg);
+ ret = snd_soc_component_read(component, mc->reg);
if (ret < 0)
return ret;
if (ret & mask)
@@ -324,7 +324,7 @@ static void wm8994_set_drc(struct snd_soc_component *component, int drc)
int save, i;
/* Save any enables; the configuration should clear them. */
- save = snd_soc_component_read32(component, base);
+ save = snd_soc_component_read(component, base);
save &= WM8994_AIF1DAC1_DRC_ENA | WM8994_AIF1ADC1L_DRC_ENA |
WM8994_AIF1ADC1R_DRC_ENA;
@@ -434,7 +434,7 @@ static void wm8994_set_retune_mobile(struct snd_soc_component *component, int bl
/* The EQ will be disabled while reconfiguring it, remember the
* current configuration.
*/
- save = snd_soc_component_read32(component, base);
+ save = snd_soc_component_read(component, base);
save &= WM8994_AIF1DAC1_EQ_ENA;
for (i = 0; i < WM8994_EQ_REGS; i++)
@@ -998,7 +998,7 @@ static bool wm8994_check_class_w_digital(struct snd_soc_component *component)
int reg, reg_r;
/* We also need the same AIF source for L/R and only one path */
- reg = snd_soc_component_read32(component, WM8994_DAC1_LEFT_MIXER_ROUTING);
+ reg = snd_soc_component_read(component, WM8994_DAC1_LEFT_MIXER_ROUTING);
switch (reg) {
case WM8994_AIF2DACL_TO_DAC1L:
dev_vdbg(component->dev, "Class W source AIF2DAC\n");
@@ -1017,7 +1017,7 @@ static bool wm8994_check_class_w_digital(struct snd_soc_component *component)
return false;
}
- reg_r = snd_soc_component_read32(component, WM8994_DAC1_RIGHT_MIXER_ROUTING);
+ reg_r = snd_soc_component_read(component, WM8994_DAC1_RIGHT_MIXER_ROUTING);
if (reg_r != reg) {
dev_vdbg(component->dev, "Left and right DAC mixers different\n");
return false;
@@ -1041,7 +1041,7 @@ static int aif_mclk_set(struct snd_soc_component *component, int aif, bool enabl
else
offset = 0;
- val = snd_soc_component_read32(component, WM8994_AIF1_CLOCKING_1 + offset);
+ val = snd_soc_component_read(component, WM8994_AIF1_CLOCKING_1 + offset);
val &= WM8994_AIF1CLK_SRC_MASK;
switch (val) {
@@ -1100,7 +1100,7 @@ static int aif1clk_ev(struct snd_soc_dapm_widget *w,
if (wm8994->channels[0] <= 2)
mask &= ~(WM8994_AIF1DAC2L_ENA | WM8994_AIF1DAC2R_ENA);
- val = snd_soc_component_read32(component, WM8994_AIF1_CONTROL_1);
+ val = snd_soc_component_read(component, WM8994_AIF1_CONTROL_1);
if ((val & WM8994_AIF1ADCL_SRC) &&
(val & WM8994_AIF1ADCR_SRC))
adc = WM8994_AIF1ADC1R_ENA | WM8994_AIF1ADC2R_ENA;
@@ -1111,7 +1111,7 @@ static int aif1clk_ev(struct snd_soc_dapm_widget *w,
adc = WM8994_AIF1ADC1R_ENA | WM8994_AIF1ADC2R_ENA |
WM8994_AIF1ADC1L_ENA | WM8994_AIF1ADC2L_ENA;
- val = snd_soc_component_read32(component, WM8994_AIF1_CONTROL_2);
+ val = snd_soc_component_read(component, WM8994_AIF1_CONTROL_2);
if ((val & WM8994_AIF1DACL_SRC) &&
(val & WM8994_AIF1DACR_SRC))
dac = WM8994_AIF1DAC1R_ENA | WM8994_AIF1DAC2R_ENA;
@@ -1146,7 +1146,7 @@ static int aif1clk_ev(struct snd_soc_dapm_widget *w,
case SND_SOC_DAPM_POST_PMU:
for (i = 0; i < ARRAY_SIZE(wm8994_vu_bits); i++)
snd_soc_component_write(component, wm8994_vu_bits[i].reg,
- snd_soc_component_read32(component,
+ snd_soc_component_read(component,
wm8994_vu_bits[i].reg));
break;
@@ -1157,7 +1157,7 @@ static int aif1clk_ev(struct snd_soc_dapm_widget *w,
snd_soc_component_update_bits(component, WM8994_POWER_MANAGEMENT_4,
mask, 0);
- val = snd_soc_component_read32(component, WM8994_CLOCKING_1);
+ val = snd_soc_component_read(component, WM8994_CLOCKING_1);
if (val & WM8994_AIF2DSPCLK_ENA)
val = WM8994_SYSDSPCLK_ENA;
else
@@ -1192,7 +1192,7 @@ static int aif2clk_ev(struct snd_soc_dapm_widget *w,
if (ret < 0)
return ret;
- val = snd_soc_component_read32(component, WM8994_AIF2_CONTROL_1);
+ val = snd_soc_component_read(component, WM8994_AIF2_CONTROL_1);
if ((val & WM8994_AIF2ADCL_SRC) &&
(val & WM8994_AIF2ADCR_SRC))
adc = WM8994_AIF2ADCR_ENA;
@@ -1203,7 +1203,7 @@ static int aif2clk_ev(struct snd_soc_dapm_widget *w,
adc = WM8994_AIF2ADCL_ENA | WM8994_AIF2ADCR_ENA;
- val = snd_soc_component_read32(component, WM8994_AIF2_CONTROL_2);
+ val = snd_soc_component_read(component, WM8994_AIF2_CONTROL_2);
if ((val & WM8994_AIF2DACL_SRC) &&
(val & WM8994_AIF2DACR_SRC))
dac = WM8994_AIF2DACR_ENA;
@@ -1239,7 +1239,7 @@ static int aif2clk_ev(struct snd_soc_dapm_widget *w,
case SND_SOC_DAPM_POST_PMU:
for (i = 0; i < ARRAY_SIZE(wm8994_vu_bits); i++)
snd_soc_component_write(component, wm8994_vu_bits[i].reg,
- snd_soc_component_read32(component,
+ snd_soc_component_read(component,
wm8994_vu_bits[i].reg));
break;
@@ -1252,7 +1252,7 @@ static int aif2clk_ev(struct snd_soc_dapm_widget *w,
WM8994_AIF2ADCL_ENA |
WM8994_AIF2ADCR_ENA, 0);
- val = snd_soc_component_read32(component, WM8994_CLOCKING_1);
+ val = snd_soc_component_read(component, WM8994_CLOCKING_1);
if (val & WM8994_AIF1DSPCLK_ENA)
val = WM8994_SYSDSPCLK_ENA;
else
@@ -1429,7 +1429,7 @@ static int post_ev(struct snd_soc_dapm_widget *w,
{
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
dev_dbg(component->dev, "SRC status: %x\n",
- snd_soc_component_read32(component,
+ snd_soc_component_read(component,
WM8994_RATE_STATUS));
return 0;
}
@@ -2209,7 +2209,7 @@ static int _wm8994_set_fll(struct snd_soc_component *component, int id, int src,
return -EINVAL;
}
- reg = snd_soc_component_read32(component, WM8994_FLL1_CONTROL_1 + reg_offset);
+ reg = snd_soc_component_read(component, WM8994_FLL1_CONTROL_1 + reg_offset);
was_enabled = reg & WM8994_FLL1_ENA;
switch (src) {
@@ -2250,12 +2250,12 @@ static int _wm8994_set_fll(struct snd_soc_component *component, int id, int src,
return ret;
/* Make sure that we're not providing SYSCLK right now */
- clk1 = snd_soc_component_read32(component, WM8994_CLOCKING_1);
+ clk1 = snd_soc_component_read(component, WM8994_CLOCKING_1);
if (clk1 & WM8994_SYSCLK_SRC)
aif_reg = WM8994_AIF2_CLOCKING_1;
else
aif_reg = WM8994_AIF1_CLOCKING_1;
- reg = snd_soc_component_read32(component, aif_reg);
+ reg = snd_soc_component_read(component, aif_reg);
if ((reg & WM8994_AIF1CLK_ENA) &&
(reg & WM8994_AIF1CLK_SRC_MASK) == aif_src) {
@@ -2270,7 +2270,7 @@ static int _wm8994_set_fll(struct snd_soc_component *component, int id, int src,
/* Disable MCLK if needed before we possibly change to new clock parent */
if (was_enabled) {
- reg = snd_soc_component_read32(component, WM8994_FLL1_CONTROL_5
+ reg = snd_soc_component_read(component, WM8994_FLL1_CONTROL_5
+ reg_offset);
reg = ((reg & WM8994_FLL1_REFCLK_SRC_MASK)
>> WM8994_FLL1_REFCLK_SRC_SHIFT) + 1;
@@ -2423,9 +2423,9 @@ out:
if (max(wm8994->aifclk[0], wm8994->aifclk[1]) < 50000) {
dev_dbg(component->dev, "Configuring AIFs for 128fs\n");
- wm8994->aifdiv[0] = snd_soc_component_read32(component, WM8994_AIF1_RATE)
+ wm8994->aifdiv[0] = snd_soc_component_read(component, WM8994_AIF1_RATE)
& WM8994_AIF1CLK_RATE_MASK;
- wm8994->aifdiv[1] = snd_soc_component_read32(component, WM8994_AIF2_RATE)
+ wm8994->aifdiv[1] = snd_soc_component_read(component, WM8994_AIF2_RATE)
& WM8994_AIF1CLK_RATE_MASK;
snd_soc_component_update_bits(component, WM8994_AIF1_RATE,
@@ -2567,9 +2567,9 @@ static int wm8994_set_dai_sysclk(struct snd_soc_dai *dai,
if (max(wm8994->aifclk[0], wm8994->aifclk[1]) < 50000) {
dev_dbg(component->dev, "Configuring AIFs for 128fs\n");
- wm8994->aifdiv[0] = snd_soc_component_read32(component, WM8994_AIF1_RATE)
+ wm8994->aifdiv[0] = snd_soc_component_read(component, WM8994_AIF1_RATE)
& WM8994_AIF1CLK_RATE_MASK;
- wm8994->aifdiv[1] = snd_soc_component_read32(component, WM8994_AIF2_RATE)
+ wm8994->aifdiv[1] = snd_soc_component_read(component, WM8994_AIF2_RATE)
& WM8994_AIF1CLK_RATE_MASK;
snd_soc_component_update_bits(component, WM8994_AIF1_RATE,
@@ -2991,7 +2991,7 @@ static int wm8994_hw_params(struct snd_pcm_substream *substream,
dai->id, wm8994->aifclk[id], bclk_rate);
if (wm8994->channels[id] == 1 &&
- (snd_soc_component_read32(component, aif1_reg) & 0x18) == 0x18)
+ (snd_soc_component_read(component, aif1_reg) & 0x18) == 0x18)
aif2 |= WM8994_AIF1_MONO;
if (wm8994->aifclk[id] == 0) {
@@ -3795,7 +3795,7 @@ static irqreturn_t wm1811_jackdet_irq(int irq, void *data)
mutex_lock(&wm8994->accdet_lock);
- reg = snd_soc_component_read32(component, WM1811_JACKDET_CTRL);
+ reg = snd_soc_component_read(component, WM1811_JACKDET_CTRL);
if (reg < 0) {
dev_err(component->dev, "Failed to read jack status: %d\n", reg);
mutex_unlock(&wm8994->accdet_lock);
@@ -4006,7 +4006,7 @@ static irqreturn_t wm8958_mic_irq(int irq, void *data)
* with an update of the MICDET status; if so it will have
* stopped detection and we can ignore this interrupt.
*/
- if (!(snd_soc_component_read32(component, WM8958_MIC_DETECT_1) & WM8958_MICD_ENA))
+ if (!(snd_soc_component_read(component, WM8958_MIC_DETECT_1) & WM8958_MICD_ENA))
return IRQ_HANDLED;
cancel_delayed_work_sync(&wm8994->mic_complete_work);
@@ -4019,7 +4019,7 @@ static irqreturn_t wm8958_mic_irq(int irq, void *data)
*/
count = 10;
do {
- reg = snd_soc_component_read32(component, WM8958_MIC_DETECT_3);
+ reg = snd_soc_component_read(component, WM8958_MIC_DETECT_3);
if (reg < 0) {
dev_err(component->dev,
"Failed to read mic detect status: %d\n",
@@ -4048,7 +4048,7 @@ static irqreturn_t wm8958_mic_irq(int irq, void *data)
/* Avoid a transient report when the accessory is being removed */
if (wm8994->jackdet) {
- ret = snd_soc_component_read32(component, WM1811_JACKDET_CTRL);
+ ret = snd_soc_component_read(component, WM1811_JACKDET_CTRL);
if (ret < 0) {
dev_err(component->dev, "Failed to read jack status: %d\n",
ret);