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author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2014-10-29 14:55:44 +0300 |
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committer | Mark Brown <broonie@kernel.org> | 2014-10-29 15:31:38 +0300 |
commit | 36bcecd0a73eb4a11c9748bc96c2d254d5364d12 (patch) | |
tree | 8bd9be21f9c04249f53387928610230171cd754f /sound/soc/davinci/davinci-mcasp.h | |
parent | f114040e3ea6e07372334ade75d1ee0775c355e1 (diff) | |
download | linux-36bcecd0a73eb4a11c9748bc96c2d254d5364d12.tar.xz |
ASoC: davinci-mcasp: Correct TX start sequence
Follow the sequence described in the TRMs when starting TX. This sequence
will make sure that we are not facing with initial channel swap caused by
no data available in McASP for transmit.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/davinci/davinci-mcasp.h')
-rw-r--r-- | sound/soc/davinci/davinci-mcasp.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sound/soc/davinci/davinci-mcasp.h b/sound/soc/davinci/davinci-mcasp.h index 98fbc451892a..9737108f0305 100644 --- a/sound/soc/davinci/davinci-mcasp.h +++ b/sound/soc/davinci/davinci-mcasp.h @@ -253,6 +253,12 @@ #define TXFSRST BIT(12) /* Frame Sync Generator Reset */ /* + * DAVINCI_MCASP_TXSTAT_REG - Transmitter Status Register Bits + * DAVINCI_MCASP_RXSTAT_REG - Receiver Status Register Bits + */ +#define XRDATA BIT(5) /* Transmit/Receive data ready */ + +/* * DAVINCI_MCASP_AMUTE_REG - Mute Control Register Bits */ #define MUTENA(val) (val) |