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authorTakashi Iwai <tiwai@suse.de>2023-03-03 16:20:56 +0300
committerTakashi Iwai <tiwai@suse.de>2023-03-03 16:20:56 +0300
commit26ed1d29fc44f3f2f0c396c1392abefac5f0454e (patch)
treeffba9ebddf759f04cbeca8adace5cc8093c58c2d /sound/soc/sof/mediatek/mt8186/mt8186.h
parente97fc9cffbb9f372b53b42c36cd7b20aab44a554 (diff)
parent7933b90b42896f5b6596e6a829bb31c5121fc2a9 (diff)
downloadlinux-26ed1d29fc44f3f2f0c396c1392abefac5f0454e.tar.xz
Merge branch 'for-next' into for-linus
Diffstat (limited to 'sound/soc/sof/mediatek/mt8186/mt8186.h')
-rw-r--r--sound/soc/sof/mediatek/mt8186/mt8186.h10
1 files changed, 9 insertions, 1 deletions
diff --git a/sound/soc/sof/mediatek/mt8186/mt8186.h b/sound/soc/sof/mediatek/mt8186/mt8186.h
index 98b2965e5ba6..5b521c60b4e3 100644
--- a/sound/soc/sof/mediatek/mt8186/mt8186.h
+++ b/sound/soc/sof/mediatek/mt8186/mt8186.h
@@ -52,7 +52,15 @@ struct snd_sof_dev;
#define ADSP_PRID 0x0
#define ADSP_ALTVEC_C0 0x04
#define ADSP_ALTVECSEL 0x0C
-#define ADSP_ALTVECSEL_C0 BIT(1)
+#define MT8188_ADSP_ALTVECSEL_C0 BIT(0)
+#define MT8186_ADSP_ALTVECSEL_C0 BIT(1)
+
+/*
+ * On MT8188, BIT(1) is not evaluated and on MT8186 BIT(0) is not evaluated:
+ * We can simplify the driver by safely setting both bits regardless of the SoC.
+ */
+#define ADSP_ALTVECSEL_C0 (MT8188_ADSP_ALTVECSEL_C0 | \
+ MT8186_ADSP_ALTVECSEL_C0)
/* dsp bus */
#define ADSP_SRAM_POOL_CON 0x190