diff options
author | Mark Brown <broonie@kernel.org> | 2022-06-07 22:37:12 +0300 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2022-06-07 22:37:12 +0300 |
commit | 073350da0aa2aead9df7927a1c1046ebf5cdd816 (patch) | |
tree | d1d5f86c817b24f245e218766505962cca3c5581 /sound/soc | |
parent | 2abdf9f80019e8244d3806ed0e1c9f725e50b452 (diff) | |
parent | f2906aa863381afb0015a9eb7fefad885d4e5a56 (diff) | |
download | linux-073350da0aa2aead9df7927a1c1046ebf5cdd816.tar.xz |
Merge tag 'v5.19-rc1' into asoc-5.19
Linux 5.19-rc1
Diffstat (limited to 'sound/soc')
-rw-r--r-- | sound/soc/codecs/cs35l41-i2c.c | 4 | ||||
-rw-r--r-- | sound/soc/codecs/cs35l41-lib.c | 303 | ||||
-rw-r--r-- | sound/soc/codecs/cs35l41-spi.c | 4 | ||||
-rw-r--r-- | sound/soc/codecs/cs35l41.c | 283 | ||||
-rw-r--r-- | sound/soc/codecs/cs35l41.h | 23 | ||||
-rw-r--r-- | sound/soc/codecs/cs42l42.h | 826 | ||||
-rw-r--r-- | sound/soc/codecs/wm_adsp.c | 10 | ||||
-rw-r--r-- | sound/soc/pxa/corgi.c | 43 | ||||
-rw-r--r-- | sound/soc/pxa/e740_wm9705.c | 37 | ||||
-rw-r--r-- | sound/soc/pxa/e750_wm9705.c | 33 | ||||
-rw-r--r-- | sound/soc/pxa/e800_wm9712.c | 33 | ||||
-rw-r--r-- | sound/soc/pxa/em-x270.c | 2 | ||||
-rw-r--r-- | sound/soc/pxa/hx4700.c | 37 | ||||
-rw-r--r-- | sound/soc/pxa/magician.c | 141 | ||||
-rw-r--r-- | sound/soc/pxa/mioa701_wm9713.c | 2 | ||||
-rw-r--r-- | sound/soc/pxa/palm27x.c | 2 | ||||
-rw-r--r-- | sound/soc/pxa/poodle.c | 51 | ||||
-rw-r--r-- | sound/soc/pxa/pxa2xx-ac97.c | 24 | ||||
-rw-r--r-- | sound/soc/pxa/pxa2xx-i2s.c | 112 | ||||
-rw-r--r-- | sound/soc/pxa/spitz.c | 58 | ||||
-rw-r--r-- | sound/soc/pxa/tosa.c | 25 | ||||
-rw-r--r-- | sound/soc/pxa/z2.c | 8 |
22 files changed, 670 insertions, 1391 deletions
diff --git a/sound/soc/codecs/cs35l41-i2c.c b/sound/soc/codecs/cs35l41-i2c.c index 86d866aeb680..37c703c08fd5 100644 --- a/sound/soc/codecs/cs35l41-i2c.c +++ b/sound/soc/codecs/cs35l41-i2c.c @@ -33,7 +33,7 @@ static int cs35l41_i2c_probe(struct i2c_client *client) { struct cs35l41_private *cs35l41; struct device *dev = &client->dev; - struct cs35l41_platform_data *pdata = dev_get_platdata(dev); + struct cs35l41_hw_cfg *hw_cfg = dev_get_platdata(dev); const struct regmap_config *regmap_config = &cs35l41_regmap_i2c; int ret; @@ -53,7 +53,7 @@ static int cs35l41_i2c_probe(struct i2c_client *client) return ret; } - return cs35l41_probe(cs35l41, pdata); + return cs35l41_probe(cs35l41, hw_cfg); } static int cs35l41_i2c_remove(struct i2c_client *client) diff --git a/sound/soc/codecs/cs35l41-lib.c b/sound/soc/codecs/cs35l41-lib.c index de022a53bdf3..6d3070ea9e06 100644 --- a/sound/soc/codecs/cs35l41-lib.c +++ b/sound/soc/codecs/cs35l41-lib.c @@ -12,6 +12,7 @@ #include <linux/regmap.h> #include <linux/regulator/consumer.h> #include <linux/slab.h> +#include <linux/firmware/cirrus/wmfw.h> #include <sound/cs35l41.h> @@ -667,6 +668,25 @@ static const struct reg_sequence cs35l41_revb2_errata_patch[] = { { CS35L41_AMP_GAIN_CTRL, 0x00000000 }, }; +static const struct reg_sequence cs35l41_fs_errata_patch[] = { + { CS35L41_DSP1_RX1_RATE, 0x00000001 }, + { CS35L41_DSP1_RX2_RATE, 0x00000001 }, + { CS35L41_DSP1_RX3_RATE, 0x00000001 }, + { CS35L41_DSP1_RX4_RATE, 0x00000001 }, + { CS35L41_DSP1_RX5_RATE, 0x00000001 }, + { CS35L41_DSP1_RX6_RATE, 0x00000001 }, + { CS35L41_DSP1_RX7_RATE, 0x00000001 }, + { CS35L41_DSP1_RX8_RATE, 0x00000001 }, + { CS35L41_DSP1_TX1_RATE, 0x00000001 }, + { CS35L41_DSP1_TX2_RATE, 0x00000001 }, + { CS35L41_DSP1_TX3_RATE, 0x00000001 }, + { CS35L41_DSP1_TX4_RATE, 0x00000001 }, + { CS35L41_DSP1_TX5_RATE, 0x00000001 }, + { CS35L41_DSP1_TX6_RATE, 0x00000001 }, + { CS35L41_DSP1_TX7_RATE, 0x00000001 }, + { CS35L41_DSP1_TX8_RATE, 0x00000001 }, +}; + static const struct cs35l41_otp_map_element_t cs35l41_otp_map_map[] = { { .id = 0x01, @@ -956,9 +976,8 @@ static const unsigned char cs35l41_bst_slope_table[4] = { 0x75, 0x6B, 0x3B, 0x28 }; - -int cs35l41_boost_config(struct device *dev, struct regmap *regmap, int boost_ind, int boost_cap, - int boost_ipk) +static int cs35l41_boost_config(struct device *dev, struct regmap *regmap, int boost_ind, + int boost_cap, int boost_ipk) { unsigned char bst_lbst_val, bst_cbst_range, bst_ipk_scaled; int ret; @@ -994,10 +1013,20 @@ int cs35l41_boost_config(struct device *dev, struct regmap *regmap, int boost_in case 101 ... 200: bst_cbst_range = 3; break; - default: /* 201 uF and greater */ + default: + if (boost_cap < 0) { + dev_err(dev, "Invalid boost capacitor value: %d nH\n", boost_cap); + return -EINVAL; + } + /* 201 uF and greater */ bst_cbst_range = 4; } + if (boost_ipk < 1600 || boost_ipk > 4500) { + dev_err(dev, "Invalid boost inductor peak current: %d mA\n", boost_ipk); + return -EINVAL; + } + ret = regmap_update_bits(regmap, CS35L41_BSTCVRT_COEFF, CS35L41_BST_K1_MASK | CS35L41_BST_K2_MASK, cs35l41_bst_k1_table[bst_lbst_val][bst_cbst_range] @@ -1019,10 +1048,6 @@ int cs35l41_boost_config(struct device *dev, struct regmap *regmap, int boost_in return ret; } - if (boost_ipk < 1600 || boost_ipk > 4500) { - dev_err(dev, "Invalid boost inductor peak current: %d mA\n", boost_ipk); - return -EINVAL; - } bst_ipk_scaled = ((boost_ipk - 1600) / 50) + 0x10; ret = regmap_update_bits(regmap, CS35L41_BSTCVRT_PEAK_CUR, CS35L41_BST_IPK_MASK, @@ -1032,9 +1057,269 @@ int cs35l41_boost_config(struct device *dev, struct regmap *regmap, int boost_in return ret; } + regmap_update_bits(regmap, CS35L41_PWR_CTRL2, CS35L41_BST_EN_MASK, + CS35L41_BST_EN_DEFAULT << CS35L41_BST_EN_SHIFT); + return 0; } -EXPORT_SYMBOL_GPL(cs35l41_boost_config); + +static const struct reg_sequence cs35l41_safe_to_reset[] = { + { 0x00000040, 0x00000055 }, + { 0x00000040, 0x000000AA }, + { 0x0000393C, 0x000000C0, 6000}, + { 0x0000393C, 0x00000000 }, + { 0x00007414, 0x00C82222 }, + { 0x0000742C, 0x00000000 }, + { 0x00000040, 0x000000CC }, + { 0x00000040, 0x00000033 }, +}; + +static const struct reg_sequence cs35l41_active_to_safe[] = { + { 0x00000040, 0x00000055 }, + { 0x00000040, 0x000000AA }, + { 0x00007438, 0x00585941 }, + { CS35L41_PWR_CTRL1, 0x00000000 }, + { 0x0000742C, 0x00000009, 3000 }, + { 0x00007438, 0x00580941 }, + { 0x00000040, 0x000000CC }, + { 0x00000040, 0x00000033 }, +}; + +static const struct reg_sequence cs35l41_safe_to_active[] = { + { 0x00000040, 0x00000055 }, + { 0x00000040, 0x000000AA }, + { 0x0000742C, 0x0000000F }, + { 0x0000742C, 0x00000079 }, + { 0x00007438, 0x00585941 }, + { CS35L41_PWR_CTRL1, 0x00000001, 3000 }, // GLOBAL_EN = 1 + { 0x0000742C, 0x000000F9 }, + { 0x00007438, 0x00580941 }, + { 0x00000040, 0x000000CC }, + { 0x00000040, 0x00000033 }, +}; + +static const struct reg_sequence cs35l41_reset_to_safe[] = { + { 0x00000040, 0x00000055 }, + { 0x00000040, 0x000000AA }, + { 0x00007438, 0x00585941 }, + { 0x00007414, 0x08C82222 }, + { 0x0000742C, 0x00000009 }, + { 0x00000040, 0x000000CC }, + { 0x00000040, 0x00000033 }, +}; + +int cs35l41_init_boost(struct device *dev, struct regmap *regmap, + struct cs35l41_hw_cfg *hw_cfg) +{ + int ret; + + switch (hw_cfg->bst_type) { + case CS35L41_INT_BOOST: + ret = cs35l41_boost_config(dev, regmap, hw_cfg->bst_ind, + hw_cfg->bst_cap, hw_cfg->bst_ipk); + if (ret) + dev_err(dev, "Error in Boost DT config: %d\n", ret); + break; + case CS35L41_EXT_BOOST: + case CS35L41_EXT_BOOST_NO_VSPK_SWITCH: + /* Only CLSA0100 doesn't use GPIO as VSPK switch, but even on that laptop we can + * toggle GPIO1 as is not connected to anything. + * There will be no other device without VSPK switch. + */ + regmap_write(regmap, CS35L41_GPIO1_CTRL1, 0x00000001); + regmap_multi_reg_write(regmap, cs35l41_reset_to_safe, + ARRAY_SIZE(cs35l41_reset_to_safe)); + ret = regmap_update_bits(regmap, CS35L41_PWR_CTRL2, CS35L41_BST_EN_MASK, + CS35L41_BST_DIS_FET_OFF << CS35L41_BST_EN_SHIFT); + break; + default: + dev_err(dev, "Boost type %d not supported\n", hw_cfg->bst_type); + ret = -EINVAL; + break; + } + + return ret; +} +EXPORT_SYMBOL_GPL(cs35l41_init_boost); + +bool cs35l41_safe_reset(struct regmap *regmap, enum cs35l41_boost_type b_type) +{ + switch (b_type) { + /* There is only one laptop that doesn't have VSPK switch. */ + case CS35L41_EXT_BOOST_NO_VSPK_SWITCH: + return false; + case CS35L41_EXT_BOOST: + regmap_write(regmap, CS35L41_GPIO1_CTRL1, 0x00000001); + regmap_multi_reg_write(regmap, cs35l41_safe_to_reset, + ARRAY_SIZE(cs35l41_safe_to_reset)); + return true; + default: + return true; + } +} +EXPORT_SYMBOL_GPL(cs35l41_safe_reset); + +int cs35l41_global_enable(struct regmap *regmap, enum cs35l41_boost_type b_type, int enable) +{ + int ret; + + switch (b_type) { + case CS35L41_INT_BOOST: + ret = regmap_update_bits(regmap, CS35L41_PWR_CTRL1, CS35L41_GLOBAL_EN_MASK, + enable << CS35L41_GLOBAL_EN_SHIFT); + usleep_range(3000, 3100); + break; + case CS35L41_EXT_BOOST: + case CS35L41_EXT_BOOST_NO_VSPK_SWITCH: + if (enable) + ret = regmap_multi_reg_write(regmap, cs35l41_safe_to_active, + ARRAY_SIZE(cs35l41_safe_to_active)); + else + ret = regmap_multi_reg_write(regmap, cs35l41_active_to_safe, + ARRAY_SIZE(cs35l41_active_to_safe)); + break; + default: + ret = -EINVAL; + break; + } + + return ret; +} +EXPORT_SYMBOL_GPL(cs35l41_global_enable); + +int cs35l41_gpio_config(struct regmap *regmap, struct cs35l41_hw_cfg *hw_cfg) +{ + struct cs35l41_gpio_cfg *gpio1 = &hw_cfg->gpio1; + struct cs35l41_gpio_cfg *gpio2 = &hw_cfg->gpio2; + int irq_pol = IRQF_TRIGGER_NONE; + + regmap_update_bits(regmap, CS35L41_GPIO1_CTRL1, + CS35L41_GPIO_POL_MASK | CS35L41_GPIO_DIR_MASK, + gpio1->pol_inv << CS35L41_GPIO_POL_SHIFT | + !gpio1->out_en << CS35L41_GPIO_DIR_SHIFT); + + regmap_update_bits(regmap, CS35L41_GPIO2_CTRL1, + CS35L41_GPIO_POL_MASK | CS35L41_GPIO_DIR_MASK, + gpio2->pol_inv << CS35L41_GPIO_POL_SHIFT | + !gpio2->out_en << CS35L41_GPIO_DIR_SHIFT); + + if (gpio1->valid) + regmap_update_bits(regmap, CS35L41_GPIO_PAD_CONTROL, CS35L41_GPIO1_CTRL_MASK, + gpio1->func << CS35L41_GPIO1_CTRL_SHIFT); + + if (gpio2->valid) { + regmap_update_bits(regmap, CS35L41_GPIO_PAD_CONTROL, CS35L41_GPIO2_CTRL_MASK, + gpio2->func << CS35L41_GPIO2_CTRL_SHIFT); + + switch (gpio2->func) { + case CS35L41_GPIO2_INT_PUSH_PULL_LOW: + case CS35L41_GPIO2_INT_OPEN_DRAIN: + irq_pol = IRQF_TRIGGER_LOW; + break; + case CS35L41_GPIO2_INT_PUSH_PULL_HIGH: + irq_pol = IRQF_TRIGGER_HIGH; + break; + default: + break; + } + } + + return irq_pol; +} +EXPORT_SYMBOL_GPL(cs35l41_gpio_config); + +static const struct cs_dsp_region cs35l41_dsp1_regions[] = { + { .type = WMFW_HALO_PM_PACKED, .base = CS35L41_DSP1_PMEM_0 }, + { .type = WMFW_HALO_XM_PACKED, .base = CS35L41_DSP1_XMEM_PACK_0 }, + { .type = WMFW_HALO_YM_PACKED, .base = CS35L41_DSP1_YMEM_PACK_0 }, + {. type = WMFW_ADSP2_XM, .base = CS35L41_DSP1_XMEM_UNPACK24_0}, + {. type = WMFW_ADSP2_YM, .base = CS35L41_DSP1_YMEM_UNPACK24_0}, +}; + +void cs35l41_configure_cs_dsp(struct device *dev, struct regmap *reg, struct cs_dsp *dsp) +{ + dsp->num = 1; + dsp->type = WMFW_HALO; + dsp->rev = 0; + dsp->dev = dev; + dsp->regmap = reg; + dsp->base = CS35L41_DSP1_CTRL_BASE; + dsp->base_sysinfo = CS35L41_DSP1_SYS_ID; + dsp->mem = cs35l41_dsp1_regions; + dsp->num_mems = ARRAY_SIZE(cs35l41_dsp1_regions); + dsp->lock_regions = 0xFFFFFFFF; +} +EXPORT_SYMBOL_GPL(cs35l41_configure_cs_dsp); + +static bool cs35l41_check_cspl_mbox_sts(enum cs35l41_cspl_mbox_cmd cmd, + enum cs35l41_cspl_mbox_status sts) +{ + switch (cmd) { + case CSPL_MBOX_CMD_NONE: + case CSPL_MBOX_CMD_UNKNOWN_CMD: + return true; + case CSPL_MBOX_CMD_PAUSE: + case CSPL_MBOX_CMD_OUT_OF_HIBERNATE: + return (sts == CSPL_MBOX_STS_PAUSED); + case CSPL_MBOX_CMD_RESUME: + return (sts == CSPL_MBOX_STS_RUNNING); + case CSPL_MBOX_CMD_REINIT: + return (sts == CSPL_MBOX_STS_RUNNING); + case CSPL_MBOX_CMD_STOP_PRE_REINIT: + return (sts == CSPL_MBOX_STS_RDY_FOR_REINIT); + default: + return false; + } +} + +int cs35l41_set_cspl_mbox_cmd(struct device *dev, struct regmap *regmap, + enum cs35l41_cspl_mbox_cmd cmd) +{ + unsigned int sts = 0, i; + int ret; + + // Set mailbox cmd + ret = regmap_write(regmap, CS35L41_DSP_VIRT1_MBOX_1, cmd); + if (ret < 0) { + if (cmd != CSPL_MBOX_CMD_OUT_OF_HIBERNATE) + dev_err(dev, "Failed to write MBOX: %d\n", ret); + return ret; + } + + // Read mailbox status and verify it is appropriate for the given cmd + for (i = 0; i < 5; i++) { + usleep_range(1000, 1100); + + ret = regmap_read(regmap, CS35L41_DSP_MBOX_2, &sts); + if (ret < 0) { + dev_err(dev, "Failed to read MBOX STS: %d\n", ret); + continue; + } + + if (!cs35l41_check_cspl_mbox_sts(cmd, sts)) + dev_dbg(dev, "[%u] cmd %u returned invalid sts %u", i, cmd, sts); + else + return 0; + } + + dev_err(dev, "Failed to set mailbox cmd %u (status %u)\n", cmd, sts); + + return -ENOMSG; +} +EXPORT_SYMBOL_GPL(cs35l41_set_cspl_mbox_cmd); + +int cs35l41_write_fs_errata(struct device *dev, struct regmap *regmap) +{ + int ret; + + ret = regmap_multi_reg_write(regmap, cs35l41_fs_errata_patch, + ARRAY_SIZE(cs35l41_fs_errata_patch)); + if (ret < 0) + dev_err(dev, "Failed to write fs errata: %d\n", ret); + + return ret; +} +EXPORT_SYMBOL_GPL(cs35l41_write_fs_errata); MODULE_DESCRIPTION("CS35L41 library"); MODULE_AUTHOR("David Rhodes, Cirrus Logic Inc, <david.rhodes@cirrus.com>"); diff --git a/sound/soc/codecs/cs35l41-spi.c b/sound/soc/codecs/cs35l41-spi.c index 169221a5b09f..9e19c946a66b 100644 --- a/sound/soc/codecs/cs35l41-spi.c +++ b/sound/soc/codecs/cs35l41-spi.c @@ -30,7 +30,7 @@ MODULE_DEVICE_TABLE(spi, cs35l41_id_spi); static int cs35l41_spi_probe(struct spi_device *spi) { const struct regmap_config *regmap_config = &cs35l41_regmap_spi; - struct cs35l41_platform_data *pdata = dev_get_platdata(&spi->dev); + struct cs35l41_hw_cfg *hw_cfg = dev_get_platdata(&spi->dev); struct cs35l41_private *cs35l41; int ret; @@ -52,7 +52,7 @@ static int cs35l41_spi_probe(struct spi_device *spi) cs35l41->dev = &spi->dev; cs35l41->irq = spi->irq; - return cs35l41_probe(cs35l41, pdata); + return cs35l41_probe(cs35l41, hw_cfg); } static void cs35l41_spi_remove(struct spi_device *spi) diff --git a/sound/soc/codecs/cs35l41.c b/sound/soc/codecs/cs35l41.c index de6f96bd8daf..3e68a07a3c8e 100644 --- a/sound/soc/codecs/cs35l41.c +++ b/sound/soc/codecs/cs35l41.c @@ -208,67 +208,6 @@ static int cs35l41_dsp_preload_ev(struct snd_soc_dapm_widget *w, } } -static bool cs35l41_check_cspl_mbox_sts(enum cs35l41_cspl_mbox_cmd cmd, - enum cs35l41_cspl_mbox_status sts) -{ - switch (cmd) { - case CSPL_MBOX_CMD_NONE: - case CSPL_MBOX_CMD_UNKNOWN_CMD: - return true; - case CSPL_MBOX_CMD_PAUSE: - case CSPL_MBOX_CMD_OUT_OF_HIBERNATE: - return (sts == CSPL_MBOX_STS_PAUSED); - case CSPL_MBOX_CMD_RESUME: - return (sts == CSPL_MBOX_STS_RUNNING); - case CSPL_MBOX_CMD_REINIT: - return (sts == CSPL_MBOX_STS_RUNNING); - case CSPL_MBOX_CMD_STOP_PRE_REINIT: - return (sts == CSPL_MBOX_STS_RDY_FOR_REINIT); - default: - return false; - } -} - -static int cs35l41_set_cspl_mbox_cmd(struct cs35l41_private *cs35l41, - enum cs35l41_cspl_mbox_cmd cmd) -{ - unsigned int sts = 0, i; - int ret; - - // Set mailbox cmd - ret = regmap_write(cs35l41->regmap, CS35L41_DSP_VIRT1_MBOX_1, cmd); - if (ret < 0) { - if (cmd != CSPL_MBOX_CMD_OUT_OF_HIBERNATE) - dev_err(cs35l41->dev, "Failed to write MBOX: %d\n", ret); - return ret; - } - - // Read mailbox status and verify it is appropriate for the given cmd - for (i = 0; i < 5; i++) { - usleep_range(1000, 1100); - - ret = regmap_read(cs35l41->regmap, CS35L41_DSP_MBOX_2, &sts); - if (ret < 0) { - dev_err(cs35l41->dev, "Failed to read MBOX STS: %d\n", ret); - continue; - } - - if (!cs35l41_check_cspl_mbox_sts(cmd, sts)) { - dev_dbg(cs35l41->dev, - "[%u] cmd %u returned invalid sts %u", - i, cmd, sts); - } else { - return 0; - } - } - - dev_err(cs35l41->dev, - "Failed to set mailbox cmd %u (status %u)\n", - cmd, sts); - - return -ENOMSG; -} - static int cs35l41_dsp_audio_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { @@ -299,9 +238,11 @@ static int cs35l41_dsp_audio_ev(struct snd_soc_dapm_widget *w, return -EINVAL; } - return cs35l41_set_cspl_mbox_cmd(cs35l41, CSPL_MBOX_CMD_RESUME); + return cs35l41_set_cspl_mbox_cmd(cs35l41->dev, cs35l41->regmap, + CSPL_MBOX_CMD_RESUME); case SND_SOC_DAPM_PRE_PMD: - return cs35l41_set_cspl_mbox_cmd(cs35l41, CSPL_MBOX_CMD_PAUSE); + return cs35l41_set_cspl_mbox_cmd(cs35l41->dev, cs35l41->regmap, + CSPL_MBOX_CMD_PAUSE); default: return 0; } @@ -578,15 +519,10 @@ static int cs35l41_main_amp_event(struct snd_soc_dapm_widget *w, cs35l41_pup_patch, ARRAY_SIZE(cs35l41_pup_patch)); - regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL1, - CS35L41_GLOBAL_EN_MASK, - 1 << CS35L41_GLOBAL_EN_SHIFT); - - usleep_range(1000, 1100); + cs35l41_global_enable(cs35l41->regmap, cs35l41->hw_cfg.bst_type, 1); break; case SND_SOC_DAPM_POST_PMD: - regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL1, - CS35L41_GLOBAL_EN_MASK, 0); + cs35l41_global_enable(cs35l41->regmap, cs35l41->hw_cfg.bst_type, 0); ret = regmap_read_poll_timeout(cs35l41->regmap, CS35L41_IRQ1_STATUS1, val, val & CS35L41_PDN_DONE_MASK, @@ -744,14 +680,6 @@ static const struct snd_soc_dapm_route cs35l41_audio_map[] = { {"CLASS H", NULL, "PCM Source"}, }; -static const struct cs_dsp_region cs35l41_dsp1_regions[] = { - { .type = WMFW_HALO_PM_PACKED, .base = CS35L41_DSP1_PMEM_0 }, - { .type = WMFW_HALO_XM_PACKED, .base = CS35L41_DSP1_XMEM_PACK_0 }, - { .type = WMFW_HALO_YM_PACKED, .base = CS35L41_DSP1_YMEM_PACK_0 }, - {. type = WMFW_ADSP2_XM, .base = CS35L41_DSP1_XMEM_UNPACK24_0}, - {. type = WMFW_ADSP2_YM, .base = CS35L41_DSP1_YMEM_UNPACK24_0}, -}; - static int cs35l41_set_channel_map(struct snd_soc_dai *dai, unsigned int tx_n, unsigned int *tx_slot, unsigned int rx_n, unsigned int *rx_slot) { @@ -995,69 +923,53 @@ static int cs35l41_dai_set_sysclk(struct snd_soc_dai *dai, static int cs35l41_set_pdata(struct cs35l41_private *cs35l41) { + struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg; int ret; - /* Set Platform Data */ - /* Required */ - if (cs35l41->pdata.bst_ipk && - cs35l41->pdata.bst_ind && cs35l41->pdata.bst_cap) { - ret = cs35l41_boost_config(cs35l41->dev, cs35l41->regmap, cs35l41->pdata.bst_ind, - cs35l41->pdata.bst_cap, cs35l41->pdata.bst_ipk); - if (ret) { - dev_err(cs35l41->dev, "Error in Boost DT config: %d\n", ret); - return ret; - } - } else { - dev_err(cs35l41->dev, "Incomplete Boost component DT config\n"); + if (!hw_cfg->valid) + return -EINVAL; + + if (hw_cfg->bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) return -EINVAL; - } + + /* Required */ + ret = cs35l41_init_boost(cs35l41->dev, cs35l41->regmap, hw_cfg); + if (ret) + return ret; /* Optional */ - if (cs35l41->pdata.dout_hiz <= CS35L41_ASP_DOUT_HIZ_MASK && - cs35l41->pdata.dout_hiz >= 0) - regmap_update_bits(cs35l41->regmap, CS35L41_SP_HIZ_CTRL, - CS35L41_ASP_DOUT_HIZ_MASK, - cs35l41->pdata.dout_hiz); + if (hw_cfg->dout_hiz <= CS35L41_ASP_DOUT_HIZ_MASK && hw_cfg->dout_hiz >= 0) + regmap_update_bits(cs35l41->regmap, CS35L41_SP_HIZ_CTRL, CS35L41_ASP_DOUT_HIZ_MASK, + hw_cfg->dout_hiz); return 0; } -static int cs35l41_irq_gpio_config(struct cs35l41_private *cs35l41) -{ - struct cs35l41_irq_cfg *irq_gpio_cfg1 = &cs35l41->pdata.irq_config1; - struct cs35l41_irq_cfg *irq_gpio_cfg2 = &cs35l41->pdata.irq_config2; - int irq_pol = IRQF_TRIGGER_NONE; - - regmap_update_bits(cs35l41->regmap, CS35L41_GPIO1_CTRL1, - CS35L41_GPIO_POL_MASK | CS35L41_GPIO_DIR_MASK, - irq_gpio_cfg1->irq_pol_inv << CS35L41_GPIO_POL_SHIFT | - !irq_gpio_cfg1->irq_out_en << CS35L41_GPIO_DIR_SHIFT); - - regmap_update_bits(cs35l41->regmap, CS35L41_GPIO2_CTRL1, - CS35L41_GPIO_POL_MASK | CS35L41_GPIO_DIR_MASK, - irq_gpio_cfg2->irq_pol_inv << CS35L41_GPIO_POL_SHIFT | - !irq_gpio_cfg2->irq_out_en << CS35L41_GPIO_DIR_SHIFT); - - regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, - CS35L41_GPIO1_CTRL_MASK | CS35L41_GPIO2_CTRL_MASK, - irq_gpio_cfg1->irq_src_sel << CS35L41_GPIO1_CTRL_SHIFT | - irq_gpio_cfg2->irq_src_sel << CS35L41_GPIO2_CTRL_SHIFT); - - if ((irq_gpio_cfg2->irq_src_sel == - (CS35L41_GPIO_CTRL_ACTV_LO | CS35L41_VALID_PDATA)) || - (irq_gpio_cfg2->irq_src_sel == - (CS35L41_GPIO_CTRL_OPEN_INT | CS35L41_VALID_PDATA))) - irq_pol = IRQF_TRIGGER_LOW; - else if (irq_gpio_cfg2->irq_src_sel == - (CS35L41_GPIO_CTRL_ACTV_HI | CS35L41_VALID_PDATA)) - irq_pol = IRQF_TRIGGER_HIGH; - - return irq_pol; -} +static const struct snd_soc_dapm_route cs35l41_ext_bst_routes[] = { + {"Main AMP", NULL, "VSPK"}, +}; + +static const struct snd_soc_dapm_widget cs35l41_ext_bst_widget[] = { + SND_SOC_DAPM_SUPPLY("VSPK", CS35L41_GPIO1_CTRL1, CS35L41_GPIO_LVL_SHIFT, 0, NULL, 0), +}; static int cs35l41_component_probe(struct snd_soc_component *component) { struct cs35l41_private *cs35l41 = snd_soc_component_get_drvdata(component); + struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); + int ret; + + if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) { + ret = snd_soc_dapm_new_controls(dapm, cs35l41_ext_bst_widget, + ARRAY_SIZE(cs35l41_ext_bst_widget)); + if (ret) + return ret; + + ret = snd_soc_dapm_add_routes(dapm, cs35l41_ext_bst_routes, + ARRAY_SIZE(cs35l41_ext_bst_routes)); + if (ret) + return ret; + } return wm_adsp2_component_probe(&cs35l41->dsp, component); } @@ -1117,73 +1029,64 @@ static const struct snd_soc_component_driver soc_component_dev_cs35l41 = { .endianness = 1, }; -static int cs35l41_handle_pdata(struct device *dev, struct cs35l41_platform_data *pdata) +static int cs35l41_handle_pdata(struct device *dev, struct cs35l41_hw_cfg *hw_cfg) { - struct cs35l41_irq_cfg *irq_gpio1_config = &pdata->irq_config1; - struct cs35l41_irq_cfg *irq_gpio2_config = &pdata->irq_config2; + struct cs35l41_gpio_cfg *gpio1 = &hw_cfg->gpio1; + struct cs35l41_gpio_cfg *gpio2 = &hw_cfg->gpio2; unsigned int val; int ret; + ret = device_property_read_u32(dev, "cirrus,boost-type", &val); + if (ret >= 0) + hw_cfg->bst_type = val; + ret = device_property_read_u32(dev, "cirrus,boost-peak-milliamp", &val); if (ret >= 0) - pdata->bst_ipk = val; + hw_cfg->bst_ipk = val; + else + hw_cfg->bst_ipk = -1; ret = device_property_read_u32(dev, "cirrus,boost-ind-nanohenry", &val); if (ret >= 0) - pdata->bst_ind = val; + hw_cfg->bst_ind = val; + else + hw_cfg->bst_ind = -1; ret = device_property_read_u32(dev, "cirrus,boost-cap-microfarad", &val); if (ret >= 0) - pdata->bst_cap = val; + hw_cfg->bst_cap = val; + else + hw_cfg->bst_cap = -1; ret = device_property_read_u32(dev, "cirrus,asp-sdout-hiz", &val); if (ret >= 0) - pdata->dout_hiz = val; + hw_cfg->dout_hiz = val; else - pdata->dout_hiz = -1; + hw_cfg->dout_hiz = -1; /* GPIO1 Pin Config */ - irq_gpio1_config->irq_pol_inv = device_property_read_bool(dev, - "cirrus,gpio1-polarity-invert"); - irq_gpio1_config->irq_out_en = device_property_read_bool(dev, - "cirrus,gpio1-output-enable"); - ret = device_property_read_u32(dev, "cirrus,gpio1-src-select", - &val); - if (ret >= 0) - irq_gpio1_config->irq_src_sel = val | CS35L41_VALID_PDATA; + gpio1->pol_inv = device_property_read_bool(dev, "cirrus,gpio1-polarity-invert"); + gpio1->out_en = device_property_read_bool(dev, "cirrus,gpio1-output-enable"); + ret = device_property_read_u32(dev, "cirrus,gpio1-src-select", &val); + if (ret >= 0) { + gpio1->func = val; + gpio1->valid = true; + } /* GPIO2 Pin Config */ - irq_gpio2_config->irq_pol_inv = device_property_read_bool(dev, - "cirrus,gpio2-polarity-invert"); - irq_gpio2_config->irq_out_en = device_property_read_bool(dev, - "cirrus,gpio2-output-enable"); - ret = device_property_read_u32(dev, "cirrus,gpio2-src-select", - &val); - if (ret >= 0) - irq_gpio2_config->irq_src_sel = val | CS35L41_VALID_PDATA; + gpio2->pol_inv = device_property_read_bool(dev, "cirrus,gpio2-polarity-invert"); + gpio2->out_en = device_property_read_bool(dev, "cirrus,gpio2-output-enable"); + ret = device_property_read_u32(dev, "cirrus,gpio2-src-select", &val); + if (ret >= 0) { + gpio2->func = val; + gpio2->valid = true; + } + + hw_cfg->valid = true; return 0; } -static const struct reg_sequence cs35l41_fs_errata_patch[] = { - { CS35L41_DSP1_RX1_RATE, 0x00000001 }, - { CS35L41_DSP1_RX2_RATE, 0x00000001 }, - { CS35L41_DSP1_RX3_RATE, 0x00000001 }, - { CS35L41_DSP1_RX4_RATE, 0x00000001 }, - { CS35L41_DSP1_RX5_RATE, 0x00000001 }, - { CS35L41_DSP1_RX6_RATE, 0x00000001 }, - { CS35L41_DSP1_RX7_RATE, 0x00000001 }, - { CS35L41_DSP1_RX8_RATE, 0x00000001 }, - { CS35L41_DSP1_TX1_RATE, 0x00000001 }, - { CS35L41_DSP1_TX2_RATE, 0x00000001 }, - { CS35L41_DSP1_TX3_RATE, 0x00000001 }, - { CS35L41_DSP1_TX4_RATE, 0x00000001 }, - { CS35L41_DSP1_TX5_RATE, 0x00000001 }, - { CS35L41_DSP1_TX6_RATE, 0x00000001 }, - { CS35L41_DSP1_TX7_RATE, 0x00000001 }, - { CS35L41_DSP1_TX8_RATE, 0x00000001 }, -}; - static int cs35l41_dsp_init(struct cs35l41_private *cs35l41) { struct wm_adsp *dsp; @@ -1191,25 +1094,14 @@ static int cs35l41_dsp_init(struct cs35l41_private *cs35l41) dsp = &cs35l41->dsp; dsp->part = "cs35l41"; - dsp->cs_dsp.num = 1; - dsp->cs_dsp.type = WMFW_HALO; - dsp->cs_dsp.rev = 0; dsp->fw = 9; /* 9 is WM_ADSP_FW_SPK_PROT in wm_adsp.c */ dsp->toggle_preload = true; - dsp->cs_dsp.dev = cs35l41->dev; - dsp->cs_dsp.regmap = cs35l41->regmap; - dsp->cs_dsp.base = CS35L41_DSP1_CTRL_BASE; - dsp->cs_dsp.base_sysinfo = CS35L41_DSP1_SYS_ID; - dsp->cs_dsp.mem = cs35l41_dsp1_regions; - dsp->cs_dsp.num_mems = ARRAY_SIZE(cs35l41_dsp1_regions); - dsp->cs_dsp.lock_regions = 0xFFFFFFFF; - - ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_fs_errata_patch, - ARRAY_SIZE(cs35l41_fs_errata_patch)); - if (ret < 0) { - dev_err(cs35l41->dev, "Failed to write fs errata: %d\n", ret); + + cs35l41_configure_cs_dsp(cs35l41->dev, cs35l41->regmap, &dsp->cs_dsp); + + ret = cs35l41_write_fs_errata(cs35l41->dev, cs35l41->regmap); + if (ret < 0) return ret; - } ret = wm_halo_init(dsp); if (ret) { @@ -1250,17 +1142,16 @@ err_dsp: return ret; } -int cs35l41_probe(struct cs35l41_private *cs35l41, - struct cs35l41_platform_data *pdata) +int cs35l41_probe(struct cs35l41_private *cs35l41, const struct cs35l41_hw_cfg *hw_cfg) { u32 regid, reg_revid, i, mtl_revid, int_status, chipid_match; int irq_pol = 0; int ret; - if (pdata) { - cs35l41->pdata = *pdata; + if (hw_cfg) { + cs35l41->hw_cfg = *hw_cfg; } else { - ret = cs35l41_handle_pdata(cs35l41->dev, &cs35l41->pdata); + ret = cs35l41_handle_pdata(cs35l41->dev, &cs35l41->hw_cfg); if (ret != 0) return ret; } @@ -1359,7 +1250,7 @@ int cs35l41_probe(struct cs35l41_private *cs35l41, cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap); - irq_pol = cs35l41_irq_gpio_config(cs35l41); + irq_pol = cs35l41_gpio_config(cs35l41->regmap, &cs35l41->hw_cfg); /* Set interrupt masks for critical errors */ regmap_write(cs35l41->regmap, CS35L41_IRQ1_MASK1, @@ -1411,6 +1302,7 @@ err_pm: wm_adsp2_remove(&cs35l41->dsp); err: + cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type); regulator_bulk_disable(CS35L41_NUM_SUPPLIES, cs35l41->supplies); gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); @@ -1425,6 +1317,7 @@ void cs35l41_remove(struct cs35l41_private *cs35l41) regmap_write(cs35l41->regmap, CS35L41_IRQ1_MASK1, 0xFFFFFFFF); wm_adsp2_remove(&cs35l41->dsp); + cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type); pm_runtime_put_noidle(cs35l41->dev); @@ -1444,6 +1337,7 @@ static int __maybe_unused cs35l41_runtime_suspend(struct device *dev) dev_dbg(cs35l41->dev, "Enter hibernate\n"); + cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type); regmap_write(cs35l41->regmap, CS35L41_WAKESRC_CTL, 0x0088); regmap_write(cs35l41->regmap, CS35L41_WAKESRC_CTL, 0x0188); @@ -1486,7 +1380,7 @@ static int cs35l41_exit_hibernate(struct cs35l41_private *cs35l41) dev_dbg(cs35l41->dev, "Exit hibernate\n"); for (j = 0; j < wake_retries; j++) { - ret = cs35l41_set_cspl_mbox_cmd(cs35l41, + ret = cs35l41_set_cspl_mbox_cmd(cs35l41->dev, cs35l41->regmap, CSPL_MBOX_CMD_OUT_OF_HIBERNATE); if (!ret) break; @@ -1540,6 +1434,7 @@ static int __maybe_unused cs35l41_runtime_resume(struct device *dev) dev_err(cs35l41->dev, "Failed to restore register cache: %d\n", ret); return ret; } + cs35l41_init_boost(cs35l41->dev, cs35l41->regmap, &cs35l41->hw_cfg); return 0; } diff --git a/sound/soc/codecs/cs35l41.h b/sound/soc/codecs/cs35l41.h index 88a3d6e3434f..c85cbc1dd333 100644 --- a/sound/soc/codecs/cs35l41.h +++ b/sound/soc/codecs/cs35l41.h @@ -23,28 +23,10 @@ extern const struct dev_pm_ops cs35l41_pm_ops; -enum cs35l41_cspl_mbox_status { - CSPL_MBOX_STS_RUNNING = 0, - CSPL_MBOX_STS_PAUSED = 1, - CSPL_MBOX_STS_RDY_FOR_REINIT = 2, -}; - -enum cs35l41_cspl_mbox_cmd { - CSPL_MBOX_CMD_NONE = 0, - CSPL_MBOX_CMD_PAUSE = 1, - CSPL_MBOX_CMD_RESUME = 2, - CSPL_MBOX_CMD_REINIT = 3, - CSPL_MBOX_CMD_STOP_PRE_REINIT = 4, - CSPL_MBOX_CMD_HIBERNATE = 5, - CSPL_MBOX_CMD_OUT_OF_HIBERNATE = 6, - CSPL_MBOX_CMD_UNKNOWN_CMD = -1, - CSPL_MBOX_CMD_INVALID_SEQUENCE = -2, -}; - struct cs35l41_private { struct wm_adsp dsp; /* needs to be first member */ struct snd_soc_codec *codec; - struct cs35l41_platform_data pdata; + struct cs35l41_hw_cfg hw_cfg; struct device *dev; struct regmap *regmap; struct regulator_bulk_data supplies[CS35L41_NUM_SUPPLIES]; @@ -53,8 +35,7 @@ struct cs35l41_private { struct gpio_desc *reset_gpio; }; -int cs35l41_probe(struct cs35l41_private *cs35l41, - struct cs35l41_platform_data *pdata); +int cs35l41_probe(struct cs35l41_private *cs35l41, const struct cs35l41_hw_cfg *hw_cfg); void cs35l41_remove(struct cs35l41_private *cs35l41); #endif /*__CS35L41_H__*/ diff --git a/sound/soc/codecs/cs42l42.h b/sound/soc/codecs/cs42l42.h index 60d3bdf5d7c9..5f50970375d4 100644 --- a/sound/soc/codecs/cs42l42.h +++ b/sound/soc/codecs/cs42l42.h @@ -2,7 +2,7 @@ /* * cs42l42.h -- CS42L42 ALSA SoC audio driver header * - * Copyright 2016 Cirrus Logic, Inc. + * Copyright 2016-2022 Cirrus Logic, Inc. * * Author: James Schulman <james.schulman@cirrus.com> * Author: Brian Austin <brian.austin@cirrus.com> @@ -14,829 +14,7 @@ #include <linux/mutex.h> #include <sound/jack.h> - -#define CS42L42_PAGE_REGISTER 0x00 /* Page Select Register */ -#define CS42L42_WIN_START 0x00 -#define CS42L42_WIN_LEN 0x100 -#define CS42L42_RANGE_MIN 0x00 -#define CS42L42_RANGE_MAX 0x7F - -#define CS42L42_PAGE_10 0x1000 -#define CS42L42_PAGE_11 0x1100 -#define CS42L42_PAGE_12 0x1200 -#define CS42L42_PAGE_13 0x1300 -#define CS42L42_PAGE_15 0x1500 -#define CS42L42_PAGE_19 0x1900 -#define CS42L42_PAGE_1B 0x1B00 -#define CS42L42_PAGE_1C 0x1C00 -#define CS42L42_PAGE_1D 0x1D00 -#define CS42L42_PAGE_1F 0x1F00 -#define CS42L42_PAGE_20 0x2000 -#define CS42L42_PAGE_21 0x2100 -#define CS42L42_PAGE_23 0x2300 -#define CS42L42_PAGE_24 0x2400 -#define CS42L42_PAGE_25 0x2500 -#define CS42L42_PAGE_26 0x2600 -#define CS42L42_PAGE_28 0x2800 -#define CS42L42_PAGE_29 0x2900 -#define CS42L42_PAGE_2A 0x2A00 -#define CS42L42_PAGE_30 0x3000 - -#define CS42L42_CHIP_ID 0x42A42 - -/* Page 0x10 Global Registers */ -#define CS42L42_DEVID_AB (CS42L42_PAGE_10 + 0x01) -#define CS42L42_DEVID_CD (CS42L42_PAGE_10 + 0x02) -#define CS42L42_DEVID_E (CS42L42_PAGE_10 + 0x03) -#define CS42L42_FABID (CS42L42_PAGE_10 + 0x04) -#define CS42L42_REVID (CS42L42_PAGE_10 + 0x05) -#define CS42L42_FRZ_CTL (CS42L42_PAGE_10 + 0x06) - -#define CS42L42_SRC_CTL (CS42L42_PAGE_10 + 0x07) -#define CS42L42_SRC_BYPASS_DAC_SHIFT 1 -#define CS42L42_SRC_BYPASS_DAC_MASK (1 << CS42L42_SRC_BYPASS_DAC_SHIFT) - -#define CS42L42_MCLK_STATUS (CS42L42_PAGE_10 + 0x08) - -#define CS42L42_MCLK_CTL (CS42L42_PAGE_10 + 0x09) -#define CS42L42_INTERNAL_FS_SHIFT 1 -#define CS42L42_INTERNAL_FS_MASK (1 << CS42L42_INTERNAL_FS_SHIFT) - -#define CS42L42_SFTRAMP_RATE (CS42L42_PAGE_10 + 0x0A) -#define CS42L42_SLOW_START_ENABLE (CS42L42_PAGE_10 + 0x0B) -#define CS42L42_SLOW_START_EN_MASK GENMASK(6, 4) -#define CS42L42_SLOW_START_EN_SHIFT 4 -#define CS42L42_I2C_DEBOUNCE (CS42L42_PAGE_10 + 0x0E) -#define CS42L42_I2C_STRETCH (CS42L42_PAGE_10 + 0x0F) -#define CS42L42_I2C_TIMEOUT (CS42L42_PAGE_10 + 0x10) - -/* Page 0x11 Power and Headset Detect Registers */ -#define CS42L42_PWR_CTL1 (CS42L42_PAGE_11 + 0x01) -#define CS42L42_ASP_DAO_PDN_SHIFT 7 -#define CS42L42_ASP_DAO_PDN_MASK (1 << CS42L42_ASP_DAO_PDN_SHIFT) -#define CS42L42_ASP_DAI_PDN_SHIFT 6 -#define CS42L42_ASP_DAI_PDN_MASK (1 << CS42L42_ASP_DAI_PDN_SHIFT) -#define CS42L42_MIXER_PDN_SHIFT 5 -#define CS42L42_MIXER_PDN_MASK (1 << CS42L42_MIXER_PDN_SHIFT) -#define CS42L42_EQ_PDN_SHIFT 4 -#define CS42L42_EQ_PDN_MASK (1 << CS42L42_EQ_PDN_SHIFT) -#define CS42L42_HP_PDN_SHIFT 3 -#define CS42L42_HP_PDN_MASK (1 << CS42L42_HP_PDN_SHIFT) -#define CS42L42_ADC_PDN_SHIFT 2 -#define CS42L42_ADC_PDN_MASK (1 << CS42L42_ADC_PDN_SHIFT) -#define CS42L42_PDN_ALL_SHIFT 0 -#define CS42L42_PDN_ALL_MASK (1 << CS42L42_PDN_ALL_SHIFT) - -#define CS42L42_PWR_CTL2 (CS42L42_PAGE_11 + 0x02) -#define CS42L42_ADC_SRC_PDNB_SHIFT 0 -#define CS42L42_ADC_SRC_PDNB_MASK (1 << CS42L42_ADC_SRC_PDNB_SHIFT) -#define CS42L42_DAC_SRC_PDNB_SHIFT 1 -#define CS42L42_DAC_SRC_PDNB_MASK (1 << CS42L42_DAC_SRC_PDNB_SHIFT) -#define CS42L42_ASP_DAI1_PDN_SHIFT 2 -#define CS42L42_ASP_DAI1_PDN_MASK (1 << CS42L42_ASP_DAI1_PDN_SHIFT) -#define CS42L42_SRC_PDN_OVERRIDE_SHIFT 3 -#define CS42L42_SRC_PDN_OVERRIDE_MASK (1 << CS42L42_SRC_PDN_OVERRIDE_SHIFT) -#define CS42L42_DISCHARGE_FILT_SHIFT 4 -#define CS42L42_DISCHARGE_FILT_MASK (1 << CS42L42_DISCHARGE_FILT_SHIFT) - -#define CS42L42_PWR_CTL3 (CS42L42_PAGE_11 + 0x03) -#define CS42L42_RING_SENSE_PDNB_SHIFT 1 -#define CS42L42_RING_SENSE_PDNB_MASK (1 << \ - CS42L42_RING_SENSE_PDNB_SHIFT) -#define CS42L42_VPMON_PDNB_SHIFT 2 -#define CS42L42_VPMON_PDNB_MASK (1 << \ - CS42L42_VPMON_PDNB_SHIFT) -#define CS42L42_SW_CLK_STP_STAT_SEL_SHIFT 5 -#define CS42L42_SW_CLK_STP_STAT_SEL_MASK (3 << \ - CS42L42_SW_CLK_STP_STAT_SEL_SHIFT) - -#define CS42L42_RSENSE_CTL1 (CS42L42_PAGE_11 + 0x04) -#define CS42L42_RS_TRIM_R_SHIFT 0 -#define CS42L42_RS_TRIM_R_MASK (1 << \ - CS42L42_RS_TRIM_R_SHIFT) -#define CS42L42_RS_TRIM_T_SHIFT 1 -#define CS42L42_RS_TRIM_T_MASK (1 << \ - CS42L42_RS_TRIM_T_SHIFT) -#define CS42L42_HPREF_RS_SHIFT 2 -#define CS42L42_HPREF_RS_MASK (1 << \ - CS42L42_HPREF_RS_SHIFT) -#define CS42L42_HSBIAS_FILT_REF_RS_SHIFT 3 -#define CS42L42_HSBIAS_FILT_REF_RS_MASK (1 << \ - CS42L42_HSBIAS_FILT_REF_RS_SHIFT) -#define CS42L42_RING_SENSE_PU_HIZ_SHIFT 6 -#define CS42L42_RING_SENSE_PU_HIZ_MASK (1 << \ - CS42L42_RING_SENSE_PU_HIZ_SHIFT) - -#define CS42L42_RSENSE_CTL2 (CS42L42_PAGE_11 + 0x05) -#define CS42L42_TS_RS_GATE_SHIFT 7 -#define CS42L42_TS_RS_GATE_MAS (1 << CS42L42_TS_RS_GATE_SHIFT) - -#define CS42L42_OSC_SWITCH (CS42L42_PAGE_11 + 0x07) -#define CS42L42_SCLK_PRESENT_SHIFT 0 -#define CS42L42_SCLK_PRESENT_MASK (1 << CS42L42_SCLK_PRESENT_SHIFT) - -#define CS42L42_OSC_SWITCH_STATUS (CS42L42_PAGE_11 + 0x09) -#define CS42L42_OSC_SW_SEL_STAT_SHIFT 0 -#define CS42L42_OSC_SW_SEL_STAT_MASK (3 << CS42L42_OSC_SW_SEL_STAT_SHIFT) -#define CS42L42_OSC_PDNB_STAT_SHIFT 2 -#define CS42L42_OSC_PDNB_STAT_MASK (1 << CS42L42_OSC_SW_SEL_STAT_SHIFT) - -#define CS42L42_RSENSE_CTL3 (CS42L42_PAGE_11 + 0x12) -#define CS42L42_RS_RISE_DBNCE_TIME_SHIFT 0 -#define CS42L42_RS_RISE_DBNCE_TIME_MASK (7 << \ - CS42L42_RS_RISE_DBNCE_TIME_SHIFT) -#define CS42L42_RS_FALL_DBNCE_TIME_SHIFT 3 -#define CS42L42_RS_FALL_DBNCE_TIME_MASK (7 << \ - CS42L42_RS_FALL_DBNCE_TIME_SHIFT) -#define CS42L42_RS_PU_EN_SHIFT 6 -#define CS42L42_RS_PU_EN_MASK (1 << \ - CS42L42_RS_PU_EN_SHIFT) -#define CS42L42_RS_INV_SHIFT 7 -#define CS42L42_RS_INV_MASK (1 << \ - CS42L42_RS_INV_SHIFT) - -#define CS42L42_TSENSE_CTL (CS42L42_PAGE_11 + 0x13) -#define CS42L42_TS_RISE_DBNCE_TIME_SHIFT 0 -#define CS42L42_TS_RISE_DBNCE_TIME_MASK (7 << \ - CS42L42_TS_RISE_DBNCE_TIME_SHIFT) -#define CS42L42_TS_FALL_DBNCE_TIME_SHIFT 3 -#define CS42L42_TS_FALL_DBNCE_TIME_MASK (7 << \ - CS42L42_TS_FALL_DBNCE_TIME_SHIFT) -#define CS42L42_TS_INV_SHIFT 7 -#define CS42L42_TS_INV_MASK (1 << \ - CS42L42_TS_INV_SHIFT) - -#define CS42L42_TSRS_INT_DISABLE (CS42L42_PAGE_11 + 0x14) -#define CS42L42_D_RS_PLUG_DBNC_SHIFT 0 -#define CS42L42_D_RS_PLUG_DBNC_MASK (1 << CS42L42_D_RS_PLUG_DBNC_SHIFT) -#define CS42L42_D_RS_UNPLUG_DBNC_SHIFT 1 -#define CS42L42_D_RS_UNPLUG_DBNC_MASK (1 << CS42L42_D_RS_UNPLUG_DBNC_SHIFT) -#define CS42L42_D_TS_PLUG_DBNC_SHIFT 2 -#define CS42L42_D_TS_PLUG_DBNC_MASK (1 << CS42L42_D_TS_PLUG_DBNC_SHIFT) -#define CS42L42_D_TS_UNPLUG_DBNC_SHIFT 3 -#define CS42L42_D_TS_UNPLUG_DBNC_MASK (1 << CS42L42_D_TS_UNPLUG_DBNC_SHIFT) - -#define CS42L42_TRSENSE_STATUS (CS42L42_PAGE_11 + 0x15) -#define CS42L42_RS_PLUG_DBNC_SHIFT 0 -#define CS42L42_RS_PLUG_DBNC_MASK (1 << CS42L42_RS_PLUG_DBNC_SHIFT) -#define CS42L42_RS_UNPLUG_DBNC_SHIFT 1 -#define CS42L42_RS_UNPLUG_DBNC_MASK (1 << CS42L42_RS_UNPLUG_DBNC_SHIFT) -#define CS42L42_TS_PLUG_DBNC_SHIFT 2 -#define CS42L42_TS_PLUG_DBNC_MASK (1 << CS42L42_TS_PLUG_DBNC_SHIFT) -#define CS42L42_TS_UNPLUG_DBNC_SHIFT 3 -#define CS42L42_TS_UNPLUG_DBNC_MASK (1 << CS42L42_TS_UNPLUG_DBNC_SHIFT) - -#define CS42L42_HSDET_CTL1 (CS42L42_PAGE_11 + 0x1F) -#define CS42L42_HSDET_COMP1_LVL_SHIFT 0 -#define CS42L42_HSDET_COMP1_LVL_MASK (15 << CS42L42_HSDET_COMP1_LVL_SHIFT) -#define CS42L42_HSDET_COMP2_LVL_SHIFT 4 -#define CS42L42_HSDET_COMP2_LVL_MASK (15 << CS42L42_HSDET_COMP2_LVL_SHIFT) - -#define CS42L42_HSDET_COMP1_LVL_VAL 12 /* 1.25V Comparator */ -#define CS42L42_HSDET_COMP2_LVL_VAL 2 /* 1.75V Comparator */ -#define CS42L42_HSDET_COMP1_LVL_DEFAULT 7 /* 1V Comparator */ -#define CS42L42_HSDET_COMP2_LVL_DEFAULT 7 /* 2V Comparator */ - -#define CS42L42_HSDET_CTL2 (CS42L42_PAGE_11 + 0x20) -#define CS42L42_HSDET_AUTO_TIME_SHIFT 0 -#define CS42L42_HSDET_AUTO_TIME_MASK (3 << CS42L42_HSDET_AUTO_TIME_SHIFT) -#define CS42L42_HSBIAS_REF_SHIFT 3 -#define CS42L42_HSBIAS_REF_MASK (1 << CS42L42_HSBIAS_REF_SHIFT) -#define CS42L42_HSDET_SET_SHIFT 4 -#define CS42L42_HSDET_SET_MASK (3 << CS42L42_HSDET_SET_SHIFT) -#define CS42L42_HSDET_CTRL_SHIFT 6 -#define CS42L42_HSDET_CTRL_MASK (3 << CS42L42_HSDET_CTRL_SHIFT) - -#define CS42L42_HS_SWITCH_CTL (CS42L42_PAGE_11 + 0x21) -#define CS42L42_SW_GNDHS_HS4_SHIFT 0 -#define CS42L42_SW_GNDHS_HS4_MASK (1 << CS42L42_SW_GNDHS_HS4_SHIFT) -#define CS42L42_SW_GNDHS_HS3_SHIFT 1 -#define CS42L42_SW_GNDHS_HS3_MASK (1 << CS42L42_SW_GNDHS_HS3_SHIFT) -#define CS42L42_SW_HSB_HS4_SHIFT 2 -#define CS42L42_SW_HSB_HS4_MASK (1 << CS42L42_SW_HSB_HS4_SHIFT) -#define CS42L42_SW_HSB_HS3_SHIFT 3 -#define CS42L42_SW_HSB_HS3_MASK (1 << CS42L42_SW_HSB_HS3_SHIFT) -#define CS42L42_SW_HSB_FILT_HS4_SHIFT 4 -#define CS42L42_SW_HSB_FILT_HS4_MASK (1 << CS42L42_SW_HSB_FILT_HS4_SHIFT) -#define CS42L42_SW_HSB_FILT_HS3_SHIFT 5 -#define CS42L42_SW_HSB_FILT_HS3_MASK (1 << CS42L42_SW_HSB_FILT_HS3_SHIFT) -#define CS42L42_SW_REF_HS4_SHIFT 6 -#define CS42L42_SW_REF_HS4_MASK (1 << CS42L42_SW_REF_HS4_SHIFT) -#define CS42L42_SW_REF_HS3_SHIFT 7 -#define CS42L42_SW_REF_HS3_MASK (1 << CS42L42_SW_REF_HS3_SHIFT) - -#define CS42L42_HS_DET_STATUS (CS42L42_PAGE_11 + 0x24) -#define CS42L42_HSDET_TYPE_SHIFT 0 -#define CS42L42_HSDET_TYPE_MASK (3 << CS42L42_HSDET_TYPE_SHIFT) -#define CS42L42_HSDET_COMP1_OUT_SHIFT 6 -#define CS42L42_HSDET_COMP1_OUT_MASK (1 << CS42L42_HSDET_COMP1_OUT_SHIFT) -#define CS42L42_HSDET_COMP2_OUT_SHIFT 7 -#define CS42L42_HSDET_COMP2_OUT_MASK (1 << CS42L42_HSDET_COMP2_OUT_SHIFT) -#define CS42L42_PLUG_CTIA 0 -#define CS42L42_PLUG_OMTP 1 -#define CS42L42_PLUG_HEADPHONE 2 -#define CS42L42_PLUG_INVALID 3 - -#define CS42L42_HSDET_SW_COMP1 ((0 << CS42L42_SW_GNDHS_HS4_SHIFT) | \ - (1 << CS42L42_SW_GNDHS_HS3_SHIFT) | \ - (1 << CS42L42_SW_HSB_HS4_SHIFT) | \ - (0 << CS42L42_SW_HSB_HS3_SHIFT) | \ - (0 << CS42L42_SW_HSB_FILT_HS4_SHIFT) | \ - (1 << CS42L42_SW_HSB_FILT_HS3_SHIFT) | \ - (0 << CS42L42_SW_REF_HS4_SHIFT) | \ - (1 << CS42L42_SW_REF_HS3_SHIFT)) -#define CS42L42_HSDET_SW_COMP2 ((1 << CS42L42_SW_GNDHS_HS4_SHIFT) | \ - (0 << CS42L42_SW_GNDHS_HS3_SHIFT) | \ - (0 << CS42L42_SW_HSB_HS4_SHIFT) | \ - (1 << CS42L42_SW_HSB_HS3_SHIFT) | \ - (1 << CS42L42_SW_HSB_FILT_HS4_SHIFT) | \ - (0 << CS42L42_SW_HSB_FILT_HS3_SHIFT) | \ - (1 << CS42L42_SW_REF_HS4_SHIFT) | \ - (0 << CS42L42_SW_REF_HS3_SHIFT)) -#define CS42L42_HSDET_SW_TYPE1 ((0 << CS42L42_SW_GNDHS_HS4_SHIFT) | \ - (1 << CS42L42_SW_GNDHS_HS3_SHIFT) | \ - (1 << CS42L42_SW_HSB_HS4_SHIFT) | \ - (0 << CS42L42_SW_HSB_HS3_SHIFT) | \ - (0 << CS42L42_SW_HSB_FILT_HS4_SHIFT) | \ - (1 << CS42L42_SW_HSB_FILT_HS3_SHIFT) | \ - (0 << CS42L42_SW_REF_HS4_SHIFT) | \ - (1 << CS42L42_SW_REF_HS3_SHIFT)) -#define CS42L42_HSDET_SW_TYPE2 ((1 << CS42L42_SW_GNDHS_HS4_SHIFT) | \ - (0 << CS42L42_SW_GNDHS_HS3_SHIFT) | \ - (0 << CS42L42_SW_HSB_HS4_SHIFT) | \ - (1 << CS42L42_SW_HSB_HS3_SHIFT) | \ - (1 << CS42L42_SW_HSB_FILT_HS4_SHIFT) | \ - (0 << CS42L42_SW_HSB_FILT_HS3_SHIFT) | \ - (1 << CS42L42_SW_REF_HS4_SHIFT) | \ - (0 << CS42L42_SW_REF_HS3_SHIFT)) -#define CS42L42_HSDET_SW_TYPE3 ((1 << CS42L42_SW_GNDHS_HS4_SHIFT) | \ - (1 << CS42L42_SW_GNDHS_HS3_SHIFT) | \ - (0 << CS42L42_SW_HSB_HS4_SHIFT) | \ - (0 << CS42L42_SW_HSB_HS3_SHIFT) | \ - (1 << CS42L42_SW_HSB_FILT_HS4_SHIFT) | \ - (1 << CS42L42_SW_HSB_FILT_HS3_SHIFT) | \ - (1 << CS42L42_SW_REF_HS4_SHIFT) | \ - (1 << CS42L42_SW_REF_HS3_SHIFT)) -#define CS42L42_HSDET_SW_TYPE4 ((0 << CS42L42_SW_GNDHS_HS4_SHIFT) | \ - (1 << CS42L42_SW_GNDHS_HS3_SHIFT) | \ - (1 << CS42L42_SW_HSB_HS4_SHIFT) | \ - (0 << CS42L42_SW_HSB_HS3_SHIFT) | \ - (0 << CS42L42_SW_HSB_FILT_HS4_SHIFT) | \ - (1 << CS42L42_SW_HSB_FILT_HS3_SHIFT) | \ - (0 << CS42L42_SW_REF_HS4_SHIFT) | \ - (1 << CS42L42_SW_REF_HS3_SHIFT)) - -#define CS42L42_HSDET_COMP_TYPE1 1 -#define CS42L42_HSDET_COMP_TYPE2 2 -#define CS42L42_HSDET_COMP_TYPE3 0 -#define CS42L42_HSDET_COMP_TYPE4 3 - -#define CS42L42_HS_CLAMP_DISABLE (CS42L42_PAGE_11 + 0x29) -#define CS42L42_HS_CLAMP_DISABLE_SHIFT 0 -#define CS42L42_HS_CLAMP_DISABLE_MASK (1 << CS42L42_HS_CLAMP_DISABLE_SHIFT) - -/* Page 0x12 Clocking Registers */ -#define CS42L42_MCLK_SRC_SEL (CS42L42_PAGE_12 + 0x01) -#define CS42L42_MCLKDIV_SHIFT 1 -#define CS42L42_MCLKDIV_MASK (1 << CS42L42_MCLKDIV_SHIFT) -#define CS42L42_MCLK_SRC_SEL_SHIFT 0 -#define CS42L42_MCLK_SRC_SEL_MASK (1 << CS42L42_MCLK_SRC_SEL_SHIFT) - -#define CS42L42_SPDIF_CLK_CFG (CS42L42_PAGE_12 + 0x02) -#define CS42L42_FSYNC_PW_LOWER (CS42L42_PAGE_12 + 0x03) - -#define CS42L42_FSYNC_PW_UPPER (CS42L42_PAGE_12 + 0x04) -#define CS42L42_FSYNC_PULSE_WIDTH_SHIFT 0 -#define CS42L42_FSYNC_PULSE_WIDTH_MASK (0xff << \ - CS42L42_FSYNC_PULSE_WIDTH_SHIFT) - -#define CS42L42_FSYNC_P_LOWER (CS42L42_PAGE_12 + 0x05) - -#define CS42L42_FSYNC_P_UPPER (CS42L42_PAGE_12 + 0x06) -#define CS42L42_FSYNC_PERIOD_SHIFT 0 -#define CS42L42_FSYNC_PERIOD_MASK (0xff << CS42L42_FSYNC_PERIOD_SHIFT) - -#define CS42L42_ASP_CLK_CFG (CS42L42_PAGE_12 + 0x07) -#define CS42L42_ASP_SCLK_EN_SHIFT 5 -#define CS42L42_ASP_SCLK_EN_MASK (1 << CS42L42_ASP_SCLK_EN_SHIFT) -#define CS42L42_ASP_MASTER_MODE 0x01 -#define CS42L42_ASP_SLAVE_MODE 0x00 -#define CS42L42_ASP_MODE_SHIFT 4 -#define CS42L42_ASP_MODE_MASK (1 << CS42L42_ASP_MODE_SHIFT) -#define CS42L42_ASP_SCPOL_SHIFT 2 -#define CS42L42_ASP_SCPOL_MASK (3 << CS42L42_ASP_SCPOL_SHIFT) -#define CS42L42_ASP_SCPOL_NOR 3 -#define CS42L42_ASP_LCPOL_SHIFT 0 -#define CS42L42_ASP_LCPOL_MASK (3 << CS42L42_ASP_LCPOL_SHIFT) -#define CS42L42_ASP_LCPOL_INV 3 - -#define CS42L42_ASP_FRM_CFG (CS42L42_PAGE_12 + 0x08) -#define CS42L42_ASP_STP_SHIFT 4 -#define CS42L42_ASP_STP_MASK (1 << CS42L42_ASP_STP_SHIFT) -#define CS42L42_ASP_5050_SHIFT 3 -#define CS42L42_ASP_5050_MASK (1 << CS42L42_ASP_5050_SHIFT) -#define CS42L42_ASP_FSD_SHIFT 0 -#define CS42L42_ASP_FSD_MASK (7 << CS42L42_ASP_FSD_SHIFT) -#define CS42L42_ASP_FSD_0_5 1 -#define CS42L42_ASP_FSD_1_0 2 -#define CS42L42_ASP_FSD_1_5 3 -#define CS42L42_ASP_FSD_2_0 4 - -#define CS42L42_FS_RATE_EN (CS42L42_PAGE_12 + 0x09) -#define CS42L42_FS_EN_SHIFT 0 -#define CS42L42_FS_EN_MASK (0xf << CS42L42_FS_EN_SHIFT) -#define CS42L42_FS_EN_IASRC_96K 0x1 -#define CS42L42_FS_EN_OASRC_96K 0x2 - -#define CS42L42_IN_ASRC_CLK (CS42L42_PAGE_12 + 0x0A) -#define CS42L42_CLK_IASRC_SEL_SHIFT 0 -#define CS42L42_CLK_IASRC_SEL_MASK (1 << CS42L42_CLK_IASRC_SEL_SHIFT) -#define CS42L42_CLK_IASRC_SEL_6 0 -#define CS42L42_CLK_IASRC_SEL_12 1 - -#define CS42L42_OUT_ASRC_CLK (CS42L42_PAGE_12 + 0x0B) -#define CS42L42_CLK_OASRC_SEL_SHIFT 0 -#define CS42L42_CLK_OASRC_SEL_MASK (1 << CS42L42_CLK_OASRC_SEL_SHIFT) -#define CS42L42_CLK_OASRC_SEL_12 1 - -#define CS42L42_PLL_DIV_CFG1 (CS42L42_PAGE_12 + 0x0C) -#define CS42L42_SCLK_PREDIV_SHIFT 0 -#define CS42L42_SCLK_PREDIV_MASK (3 << CS42L42_SCLK_PREDIV_SHIFT) - -/* Page 0x13 Interrupt Registers */ -/* Interrupts */ -#define CS42L42_ADC_OVFL_STATUS (CS42L42_PAGE_13 + 0x01) -#define CS42L42_MIXER_STATUS (CS42L42_PAGE_13 + 0x02) -#define CS42L42_SRC_STATUS (CS42L42_PAGE_13 + 0x03) -#define CS42L42_ASP_RX_STATUS (CS42L42_PAGE_13 + 0x04) -#define CS42L42_ASP_TX_STATUS (CS42L42_PAGE_13 + 0x05) -#define CS42L42_CODEC_STATUS (CS42L42_PAGE_13 + 0x08) -#define CS42L42_DET_INT_STATUS1 (CS42L42_PAGE_13 + 0x09) -#define CS42L42_DET_INT_STATUS2 (CS42L42_PAGE_13 + 0x0A) -#define CS42L42_SRCPL_INT_STATUS (CS42L42_PAGE_13 + 0x0B) -#define CS42L42_VPMON_STATUS (CS42L42_PAGE_13 + 0x0D) -#define CS42L42_PLL_LOCK_STATUS (CS42L42_PAGE_13 + 0x0E) -#define CS42L42_TSRS_PLUG_STATUS (CS42L42_PAGE_13 + 0x0F) -/* Masks */ -#define CS42L42_ADC_OVFL_INT_MASK (CS42L42_PAGE_13 + 0x16) -#define CS42L42_ADC_OVFL_SHIFT 0 -#define CS42L42_ADC_OVFL_MASK (1 << CS42L42_ADC_OVFL_SHIFT) -#define CS42L42_ADC_OVFL_VAL_MASK CS42L42_ADC_OVFL_MASK - -#define CS42L42_MIXER_INT_MASK (CS42L42_PAGE_13 + 0x17) -#define CS42L42_MIX_CHB_OVFL_SHIFT 0 -#define CS42L42_MIX_CHB_OVFL_MASK (1 << CS42L42_MIX_CHB_OVFL_SHIFT) -#define CS42L42_MIX_CHA_OVFL_SHIFT 1 -#define CS42L42_MIX_CHA_OVFL_MASK (1 << CS42L42_MIX_CHA_OVFL_SHIFT) -#define CS42L42_EQ_OVFL_SHIFT 2 -#define CS42L42_EQ_OVFL_MASK (1 << CS42L42_EQ_OVFL_SHIFT) -#define CS42L42_EQ_BIQUAD_OVFL_SHIFT 3 -#define CS42L42_EQ_BIQUAD_OVFL_MASK (1 << CS42L42_EQ_BIQUAD_OVFL_SHIFT) -#define CS42L42_MIXER_VAL_MASK (CS42L42_MIX_CHB_OVFL_MASK | \ - CS42L42_MIX_CHA_OVFL_MASK | \ - CS42L42_EQ_OVFL_MASK | \ - CS42L42_EQ_BIQUAD_OVFL_MASK) - -#define CS42L42_SRC_INT_MASK (CS42L42_PAGE_13 + 0x18) -#define CS42L42_SRC_ILK_SHIFT 0 -#define CS42L42_SRC_ILK_MASK (1 << CS42L42_SRC_ILK_SHIFT) -#define CS42L42_SRC_OLK_SHIFT 1 -#define CS42L42_SRC_OLK_MASK (1 << CS42L42_SRC_OLK_SHIFT) -#define CS42L42_SRC_IUNLK_SHIFT 2 -#define CS42L42_SRC_IUNLK_MASK (1 << CS42L42_SRC_IUNLK_SHIFT) -#define CS42L42_SRC_OUNLK_SHIFT 3 -#define CS42L42_SRC_OUNLK_MASK (1 << CS42L42_SRC_OUNLK_SHIFT) -#define CS42L42_SRC_VAL_MASK (CS42L42_SRC_ILK_MASK | \ - CS42L42_SRC_OLK_MASK | \ - CS42L42_SRC_IUNLK_MASK | \ - CS42L42_SRC_OUNLK_MASK) - -#define CS42L42_ASP_RX_INT_MASK (CS42L42_PAGE_13 + 0x19) -#define CS42L42_ASPRX_NOLRCK_SHIFT 0 -#define CS42L42_ASPRX_NOLRCK_MASK (1 << CS42L42_ASPRX_NOLRCK_SHIFT) -#define CS42L42_ASPRX_EARLY_SHIFT 1 -#define CS42L42_ASPRX_EARLY_MASK (1 << CS42L42_ASPRX_EARLY_SHIFT) -#define CS42L42_ASPRX_LATE_SHIFT 2 -#define CS42L42_ASPRX_LATE_MASK (1 << CS42L42_ASPRX_LATE_SHIFT) -#define CS42L42_ASPRX_ERROR_SHIFT 3 -#define CS42L42_ASPRX_ERROR_MASK (1 << CS42L42_ASPRX_ERROR_SHIFT) -#define CS42L42_ASPRX_OVLD_SHIFT 4 -#define CS42L42_ASPRX_OVLD_MASK (1 << CS42L42_ASPRX_OVLD_SHIFT) -#define CS42L42_ASP_RX_VAL_MASK (CS42L42_ASPRX_NOLRCK_MASK | \ - CS42L42_ASPRX_EARLY_MASK | \ - CS42L42_ASPRX_LATE_MASK | \ - CS42L42_ASPRX_ERROR_MASK | \ - CS42L42_ASPRX_OVLD_MASK) - -#define CS42L42_ASP_TX_INT_MASK (CS42L42_PAGE_13 + 0x1A) -#define CS42L42_ASPTX_NOLRCK_SHIFT 0 -#define CS42L42_ASPTX_NOLRCK_MASK (1 << CS42L42_ASPTX_NOLRCK_SHIFT) -#define CS42L42_ASPTX_EARLY_SHIFT 1 -#define CS42L42_ASPTX_EARLY_MASK (1 << CS42L42_ASPTX_EARLY_SHIFT) -#define CS42L42_ASPTX_LATE_SHIFT 2 -#define CS42L42_ASPTX_LATE_MASK (1 << CS42L42_ASPTX_LATE_SHIFT) -#define CS42L42_ASPTX_SMERROR_SHIFT 3 -#define CS42L42_ASPTX_SMERROR_MASK (1 << CS42L42_ASPTX_SMERROR_SHIFT) -#define CS42L42_ASP_TX_VAL_MASK (CS42L42_ASPTX_NOLRCK_MASK | \ - CS42L42_ASPTX_EARLY_MASK | \ - CS42L42_ASPTX_LATE_MASK | \ - CS42L42_ASPTX_SMERROR_MASK) - -#define CS42L42_CODEC_INT_MASK (CS42L42_PAGE_13 + 0x1B) -#define CS42L42_PDN_DONE_SHIFT 0 -#define CS42L42_PDN_DONE_MASK (1 << CS42L42_PDN_DONE_SHIFT) -#define CS42L42_HSDET_AUTO_DONE_SHIFT 1 -#define CS42L42_HSDET_AUTO_DONE_MASK (1 << CS42L42_HSDET_AUTO_DONE_SHIFT) -#define CS42L42_CODEC_VAL_MASK (CS42L42_PDN_DONE_MASK | \ - CS42L42_HSDET_AUTO_DONE_MASK) - -#define CS42L42_SRCPL_INT_MASK (CS42L42_PAGE_13 + 0x1C) -#define CS42L42_SRCPL_ADC_LK_SHIFT 0 -#define CS42L42_SRCPL_ADC_LK_MASK (1 << CS42L42_SRCPL_ADC_LK_SHIFT) -#define CS42L42_SRCPL_DAC_LK_SHIFT 2 -#define CS42L42_SRCPL_DAC_LK_MASK (1 << CS42L42_SRCPL_DAC_LK_SHIFT) -#define CS42L42_SRCPL_ADC_UNLK_SHIFT 5 -#define CS42L42_SRCPL_ADC_UNLK_MASK (1 << CS42L42_SRCPL_ADC_UNLK_SHIFT) -#define CS42L42_SRCPL_DAC_UNLK_SHIFT 6 -#define CS42L42_SRCPL_DAC_UNLK_MASK (1 << CS42L42_SRCPL_DAC_UNLK_SHIFT) -#define CS42L42_SRCPL_VAL_MASK (CS42L42_SRCPL_ADC_LK_MASK | \ - CS42L42_SRCPL_DAC_LK_MASK | \ - CS42L42_SRCPL_ADC_UNLK_MASK | \ - CS42L42_SRCPL_DAC_UNLK_MASK) - -#define CS42L42_VPMON_INT_MASK (CS42L42_PAGE_13 + 0x1E) -#define CS42L42_VPMON_SHIFT 0 -#define CS42L42_VPMON_MASK (1 << CS42L42_VPMON_SHIFT) -#define CS42L42_VPMON_VAL_MASK CS42L42_VPMON_MASK - -#define CS42L42_PLL_LOCK_INT_MASK (CS42L42_PAGE_13 + 0x1F) -#define CS42L42_PLL_LOCK_SHIFT 0 -#define CS42L42_PLL_LOCK_MASK (1 << CS42L42_PLL_LOCK_SHIFT) -#define CS42L42_PLL_LOCK_VAL_MASK CS42L42_PLL_LOCK_MASK - -#define CS42L42_TSRS_PLUG_INT_MASK (CS42L42_PAGE_13 + 0x20) -#define CS42L42_RS_PLUG_SHIFT 0 -#define CS42L42_RS_PLUG_MASK (1 << CS42L42_RS_PLUG_SHIFT) -#define CS42L42_RS_UNPLUG_SHIFT 1 -#define CS42L42_RS_UNPLUG_MASK (1 << CS42L42_RS_UNPLUG_SHIFT) -#define CS42L42_TS_PLUG_SHIFT 2 -#define CS42L42_TS_PLUG_MASK (1 << CS42L42_TS_PLUG_SHIFT) -#define CS42L42_TS_UNPLUG_SHIFT 3 -#define CS42L42_TS_UNPLUG_MASK (1 << CS42L42_TS_UNPLUG_SHIFT) -#define CS42L42_TSRS_PLUG_VAL_MASK (CS42L42_RS_PLUG_MASK | \ - CS42L42_RS_UNPLUG_MASK | \ - CS42L42_TS_PLUG_MASK | \ - CS42L42_TS_UNPLUG_MASK) -#define CS42L42_TS_PLUG 3 -#define CS42L42_TS_UNPLUG 0 -#define CS42L42_TS_TRANS 1 - -/* - * NOTE: PLL_START must be 0 while both ADC_PDN=1 and HP_PDN=1. - * Otherwise it will prevent FILT+ from charging properly. - */ -#define CS42L42_PLL_CTL1 (CS42L42_PAGE_15 + 0x01) -#define CS42L42_PLL_START_SHIFT 0 -#define CS42L42_PLL_START_MASK (1 << CS42L42_PLL_START_SHIFT) - -#define CS42L42_PLL_DIV_FRAC0 (CS42L42_PAGE_15 + 0x02) -#define CS42L42_PLL_DIV_FRAC_SHIFT 0 -#define CS42L42_PLL_DIV_FRAC_MASK (0xff << CS42L42_PLL_DIV_FRAC_SHIFT) - -#define CS42L42_PLL_DIV_FRAC1 (CS42L42_PAGE_15 + 0x03) -#define CS42L42_PLL_DIV_FRAC2 (CS42L42_PAGE_15 + 0x04) - -#define CS42L42_PLL_DIV_INT (CS42L42_PAGE_15 + 0x05) -#define CS42L42_PLL_DIV_INT_SHIFT 0 -#define CS42L42_PLL_DIV_INT_MASK (0xff << CS42L42_PLL_DIV_INT_SHIFT) - -#define CS42L42_PLL_CTL3 (CS42L42_PAGE_15 + 0x08) -#define CS42L42_PLL_DIVOUT_SHIFT 0 -#define CS42L42_PLL_DIVOUT_MASK (0xff << CS42L42_PLL_DIVOUT_SHIFT) - -#define CS42L42_PLL_CAL_RATIO (CS42L42_PAGE_15 + 0x0A) -#define CS42L42_PLL_CAL_RATIO_SHIFT 0 -#define CS42L42_PLL_CAL_RATIO_MASK (0xff << CS42L42_PLL_CAL_RATIO_SHIFT) - -#define CS42L42_PLL_CTL4 (CS42L42_PAGE_15 + 0x1B) -#define CS42L42_PLL_MODE_SHIFT 0 -#define CS42L42_PLL_MODE_MASK (3 << CS42L42_PLL_MODE_SHIFT) - -/* Page 0x19 HP Load Detect Registers */ -#define CS42L42_LOAD_DET_RCSTAT (CS42L42_PAGE_19 + 0x25) -#define CS42L42_RLA_STAT_SHIFT 0 -#define CS42L42_RLA_STAT_MASK (3 << CS42L42_RLA_STAT_SHIFT) -#define CS42L42_RLA_STAT_15_OHM 0 - -#define CS42L42_LOAD_DET_DONE (CS42L42_PAGE_19 + 0x26) -#define CS42L42_HPLOAD_DET_DONE_SHIFT 0 -#define CS42L42_HPLOAD_DET_DONE_MASK (1 << CS42L42_HPLOAD_DET_DONE_SHIFT) - -#define CS42L42_LOAD_DET_EN (CS42L42_PAGE_19 + 0x27) -#define CS42L42_HP_LD_EN_SHIFT 0 -#define CS42L42_HP_LD_EN_MASK (1 << CS42L42_HP_LD_EN_SHIFT) - -/* Page 0x1B Headset Interface Registers */ -#define CS42L42_HSBIAS_SC_AUTOCTL (CS42L42_PAGE_1B + 0x70) -#define CS42L42_HSBIAS_SENSE_TRIP_SHIFT 0 -#define CS42L42_HSBIAS_SENSE_TRIP_MASK (7 << \ - CS42L42_HSBIAS_SENSE_TRIP_SHIFT) -#define CS42L42_TIP_SENSE_EN_SHIFT 5 -#define CS42L42_TIP_SENSE_EN_MASK (1 << \ - CS42L42_TIP_SENSE_EN_SHIFT) -#define CS42L42_AUTO_HSBIAS_HIZ_SHIFT 6 -#define CS42L42_AUTO_HSBIAS_HIZ_MASK (1 << \ - CS42L42_AUTO_HSBIAS_HIZ_SHIFT) -#define CS42L42_HSBIAS_SENSE_EN_SHIFT 7 -#define CS42L42_HSBIAS_SENSE_EN_MASK (1 << \ - CS42L42_HSBIAS_SENSE_EN_SHIFT) - -#define CS42L42_WAKE_CTL (CS42L42_PAGE_1B + 0x71) -#define CS42L42_WAKEB_CLEAR_SHIFT 0 -#define CS42L42_WAKEB_CLEAR_MASK (1 << CS42L42_WAKEB_CLEAR_SHIFT) -#define CS42L42_WAKEB_MODE_SHIFT 5 -#define CS42L42_WAKEB_MODE_MASK (1 << CS42L42_WAKEB_MODE_SHIFT) -#define CS42L42_M_HP_WAKE_SHIFT 6 -#define CS42L42_M_HP_WAKE_MASK (1 << CS42L42_M_HP_WAKE_SHIFT) -#define CS42L42_M_MIC_WAKE_SHIFT 7 -#define CS42L42_M_MIC_WAKE_MASK (1 << CS42L42_M_MIC_WAKE_SHIFT) - -#define CS42L42_ADC_DISABLE_MUTE (CS42L42_PAGE_1B + 0x72) -#define CS42L42_ADC_DISABLE_S0_MUTE_SHIFT 7 -#define CS42L42_ADC_DISABLE_S0_MUTE_MASK (1 << \ - CS42L42_ADC_DISABLE_S0_MUTE_SHIFT) - -#define CS42L42_TIPSENSE_CTL (CS42L42_PAGE_1B + 0x73) -#define CS42L42_TIP_SENSE_DEBOUNCE_SHIFT 0 -#define CS42L42_TIP_SENSE_DEBOUNCE_MASK (3 << \ - CS42L42_TIP_SENSE_DEBOUNCE_SHIFT) -#define CS42L42_TIP_SENSE_INV_SHIFT 5 -#define CS42L42_TIP_SENSE_INV_MASK (1 << \ - CS42L42_TIP_SENSE_INV_SHIFT) -#define CS42L42_TIP_SENSE_CTRL_SHIFT 6 -#define CS42L42_TIP_SENSE_CTRL_MASK (3 << \ - CS42L42_TIP_SENSE_CTRL_SHIFT) - -/* - * NOTE: DETECT_MODE must be 0 while both ADC_PDN=1 and HP_PDN=1. - * Otherwise it will prevent FILT+ from charging properly. - */ -#define CS42L42_MISC_DET_CTL (CS42L42_PAGE_1B + 0x74) -#define CS42L42_PDN_MIC_LVL_DET_SHIFT 0 -#define CS42L42_PDN_MIC_LVL_DET_MASK (1 << CS42L42_PDN_MIC_LVL_DET_SHIFT) -#define CS42L42_HSBIAS_CTL_SHIFT 1 -#define CS42L42_HSBIAS_CTL_MASK (3 << CS42L42_HSBIAS_CTL_SHIFT) -#define CS42L42_DETECT_MODE_SHIFT 3 -#define CS42L42_DETECT_MODE_MASK (3 << CS42L42_DETECT_MODE_SHIFT) - -#define CS42L42_MIC_DET_CTL1 (CS42L42_PAGE_1B + 0x75) -#define CS42L42_HS_DET_LEVEL_SHIFT 0 -#define CS42L42_HS_DET_LEVEL_MASK (0x3F << CS42L42_HS_DET_LEVEL_SHIFT) -#define CS42L42_EVENT_STAT_SEL_SHIFT 6 -#define CS42L42_EVENT_STAT_SEL_MASK (1 << CS42L42_EVENT_STAT_SEL_SHIFT) -#define CS42L42_LATCH_TO_VP_SHIFT 7 -#define CS42L42_LATCH_TO_VP_MASK (1 << CS42L42_LATCH_TO_VP_SHIFT) - -#define CS42L42_MIC_DET_CTL2 (CS42L42_PAGE_1B + 0x76) -#define CS42L42_DEBOUNCE_TIME_SHIFT 5 -#define CS42L42_DEBOUNCE_TIME_MASK (0x07 << CS42L42_DEBOUNCE_TIME_SHIFT) - -#define CS42L42_DET_STATUS1 (CS42L42_PAGE_1B + 0x77) -#define CS42L42_HSBIAS_HIZ_MODE_SHIFT 6 -#define CS42L42_HSBIAS_HIZ_MODE_MASK (1 << CS42L42_HSBIAS_HIZ_MODE_SHIFT) -#define CS42L42_TIP_SENSE_SHIFT 7 -#define CS42L42_TIP_SENSE_MASK (1 << CS42L42_TIP_SENSE_SHIFT) - -#define CS42L42_DET_STATUS2 (CS42L42_PAGE_1B + 0x78) -#define CS42L42_SHORT_TRUE_SHIFT 0 -#define CS42L42_SHORT_TRUE_MASK (1 << CS42L42_SHORT_TRUE_SHIFT) -#define CS42L42_HS_TRUE_SHIFT 1 -#define CS42L42_HS_TRUE_MASK (1 << CS42L42_HS_TRUE_SHIFT) - -#define CS42L42_DET_INT1_MASK (CS42L42_PAGE_1B + 0x79) -#define CS42L42_TIP_SENSE_UNPLUG_SHIFT 5 -#define CS42L42_TIP_SENSE_UNPLUG_MASK (1 << CS42L42_TIP_SENSE_UNPLUG_SHIFT) -#define CS42L42_TIP_SENSE_PLUG_SHIFT 6 -#define CS42L42_TIP_SENSE_PLUG_MASK (1 << CS42L42_TIP_SENSE_PLUG_SHIFT) -#define CS42L42_HSBIAS_SENSE_SHIFT 7 -#define CS42L42_HSBIAS_SENSE_MASK (1 << CS42L42_HSBIAS_SENSE_SHIFT) -#define CS42L42_DET_INT_VAL1_MASK (CS42L42_TIP_SENSE_UNPLUG_MASK | \ - CS42L42_TIP_SENSE_PLUG_MASK | \ - CS42L42_HSBIAS_SENSE_MASK) - -#define CS42L42_DET_INT2_MASK (CS42L42_PAGE_1B + 0x7A) -#define CS42L42_M_SHORT_DET_SHIFT 0 -#define CS42L42_M_SHORT_DET_MASK (1 << \ - CS42L42_M_SHORT_DET_SHIFT) -#define CS42L42_M_SHORT_RLS_SHIFT 1 -#define CS42L42_M_SHORT_RLS_MASK (1 << \ - CS42L42_M_SHORT_RLS_SHIFT) -#define CS42L42_M_HSBIAS_HIZ_SHIFT 2 -#define CS42L42_M_HSBIAS_HIZ_MASK (1 << \ - CS42L42_M_HSBIAS_HIZ_SHIFT) -#define CS42L42_M_DETECT_FT_SHIFT 6 -#define CS42L42_M_DETECT_FT_MASK (1 << \ - CS42L42_M_DETECT_FT_SHIFT) -#define CS42L42_M_DETECT_TF_SHIFT 7 -#define CS42L42_M_DETECT_TF_MASK (1 << \ - CS42L42_M_DETECT_TF_SHIFT) -#define CS42L42_DET_INT_VAL2_MASK (CS42L42_M_SHORT_DET_MASK | \ - CS42L42_M_SHORT_RLS_MASK | \ - CS42L42_M_HSBIAS_HIZ_MASK | \ - CS42L42_M_DETECT_FT_MASK | \ - CS42L42_M_DETECT_TF_MASK) - -/* Page 0x1C Headset Bias Registers */ -#define CS42L42_HS_BIAS_CTL (CS42L42_PAGE_1C + 0x03) -#define CS42L42_HSBIAS_RAMP_SHIFT 0 -#define CS42L42_HSBIAS_RAMP_MASK (3 << CS42L42_HSBIAS_RAMP_SHIFT) -#define CS42L42_HSBIAS_PD_SHIFT 4 -#define CS42L42_HSBIAS_PD_MASK (1 << CS42L42_HSBIAS_PD_SHIFT) -#define CS42L42_HSBIAS_CAPLESS_SHIFT 7 -#define CS42L42_HSBIAS_CAPLESS_MASK (1 << CS42L42_HSBIAS_CAPLESS_SHIFT) - -/* Page 0x1D ADC Registers */ -#define CS42L42_ADC_CTL (CS42L42_PAGE_1D + 0x01) -#define CS42L42_ADC_NOTCH_DIS_SHIFT 5 -#define CS42L42_ADC_FORCE_WEAK_VCM_SHIFT 4 -#define CS42L42_ADC_INV_SHIFT 2 -#define CS42L42_ADC_DIG_BOOST_SHIFT 0 - -#define CS42L42_ADC_VOLUME (CS42L42_PAGE_1D + 0x03) -#define CS42L42_ADC_VOL_SHIFT 0 - -#define CS42L42_ADC_WNF_HPF_CTL (CS42L42_PAGE_1D + 0x04) -#define CS42L42_ADC_WNF_CF_SHIFT 4 -#define CS42L42_ADC_WNF_EN_SHIFT 3 -#define CS42L42_ADC_HPF_CF_SHIFT 1 -#define CS42L42_ADC_HPF_EN_SHIFT 0 - -/* Page 0x1F DAC Registers */ -#define CS42L42_DAC_CTL1 (CS42L42_PAGE_1F + 0x01) -#define CS42L42_DACB_INV_SHIFT 1 -#define CS42L42_DACA_INV_SHIFT 0 - -#define CS42L42_DAC_CTL2 (CS42L42_PAGE_1F + 0x06) -#define CS42L42_HPOUT_PULLDOWN_SHIFT 4 -#define CS42L42_HPOUT_PULLDOWN_MASK (15 << CS42L42_HPOUT_PULLDOWN_SHIFT) -#define CS42L42_HPOUT_LOAD_SHIFT 3 -#define CS42L42_HPOUT_LOAD_MASK (1 << CS42L42_HPOUT_LOAD_SHIFT) -#define CS42L42_HPOUT_CLAMP_SHIFT 2 -#define CS42L42_HPOUT_CLAMP_MASK (1 << CS42L42_HPOUT_CLAMP_SHIFT) -#define CS42L42_DAC_HPF_EN_SHIFT 1 -#define CS42L42_DAC_HPF_EN_MASK (1 << CS42L42_DAC_HPF_EN_SHIFT) -#define CS42L42_DAC_MON_EN_SHIFT 0 -#define CS42L42_DAC_MON_EN_MASK (1 << CS42L42_DAC_MON_EN_SHIFT) - -/* Page 0x20 HP CTL Registers */ -#define CS42L42_HP_CTL (CS42L42_PAGE_20 + 0x01) -#define CS42L42_HP_ANA_BMUTE_SHIFT 3 -#define CS42L42_HP_ANA_BMUTE_MASK (1 << CS42L42_HP_ANA_BMUTE_SHIFT) -#define CS42L42_HP_ANA_AMUTE_SHIFT 2 -#define CS42L42_HP_ANA_AMUTE_MASK (1 << CS42L42_HP_ANA_AMUTE_SHIFT) -#define CS42L42_HP_FULL_SCALE_VOL_SHIFT 1 -#define CS42L42_HP_FULL_SCALE_VOL_MASK (1 << CS42L42_HP_FULL_SCALE_VOL_SHIFT) - -/* Page 0x21 Class H Registers */ -#define CS42L42_CLASSH_CTL (CS42L42_PAGE_21 + 0x01) - -/* Page 0x23 Mixer Volume Registers */ -#define CS42L42_MIXER_CHA_VOL (CS42L42_PAGE_23 + 0x01) -#define CS42L42_MIXER_ADC_VOL (CS42L42_PAGE_23 + 0x02) - -#define CS42L42_MIXER_CHB_VOL (CS42L42_PAGE_23 + 0x03) -#define CS42L42_MIXER_CH_VOL_SHIFT 0 -#define CS42L42_MIXER_CH_VOL_MASK (0x3f << CS42L42_MIXER_CH_VOL_SHIFT) - -/* Page 0x24 EQ Registers */ -#define CS42L42_EQ_COEF_IN0 (CS42L42_PAGE_24 + 0x01) -#define CS42L42_EQ_COEF_IN1 (CS42L42_PAGE_24 + 0x02) -#define CS42L42_EQ_COEF_IN2 (CS42L42_PAGE_24 + 0x03) -#define CS42L42_EQ_COEF_IN3 (CS42L42_PAGE_24 + 0x04) -#define CS42L42_EQ_COEF_RW (CS42L42_PAGE_24 + 0x06) -#define CS42L42_EQ_COEF_OUT0 (CS42L42_PAGE_24 + 0x07) -#define CS42L42_EQ_COEF_OUT1 (CS42L42_PAGE_24 + 0x08) -#define CS42L42_EQ_COEF_OUT2 (CS42L42_PAGE_24 + 0x09) -#define CS42L42_EQ_COEF_OUT3 (CS42L42_PAGE_24 + 0x0A) -#define CS42L42_EQ_INIT_STAT (CS42L42_PAGE_24 + 0x0B) -#define CS42L42_EQ_START_FILT (CS42L42_PAGE_24 + 0x0C) -#define CS42L42_EQ_MUTE_CTL (CS42L42_PAGE_24 + 0x0E) - -/* Page 0x25 Audio Port Registers */ -#define CS42L42_SP_RX_CH_SEL (CS42L42_PAGE_25 + 0x01) -#define CS42L42_SP_RX_CHB_SEL_SHIFT 2 -#define CS42L42_SP_RX_CHB_SEL_MASK (3 << CS42L42_SP_RX_CHB_SEL_SHIFT) - -#define CS42L42_SP_RX_ISOC_CTL (CS42L42_PAGE_25 + 0x02) -#define CS42L42_SP_RX_RSYNC_SHIFT 6 -#define CS42L42_SP_RX_RSYNC_MASK (1 << CS42L42_SP_RX_RSYNC_SHIFT) -#define CS42L42_SP_RX_NSB_POS_SHIFT 3 -#define CS42L42_SP_RX_NSB_POS_MASK (7 << CS42L42_SP_RX_NSB_POS_SHIFT) -#define CS42L42_SP_RX_NFS_NSBB_SHIFT 2 -#define CS42L42_SP_RX_NFS_NSBB_MASK (1 << CS42L42_SP_RX_NFS_NSBB_SHIFT) -#define CS42L42_SP_RX_ISOC_MODE_SHIFT 0 -#define CS42L42_SP_RX_ISOC_MODE_MASK (3 << CS42L42_SP_RX_ISOC_MODE_SHIFT) - -#define CS42L42_SP_RX_FS (CS42L42_PAGE_25 + 0x03) -#define CS42l42_SPDIF_CH_SEL (CS42L42_PAGE_25 + 0x04) -#define CS42L42_SP_TX_ISOC_CTL (CS42L42_PAGE_25 + 0x05) -#define CS42L42_SP_TX_FS (CS42L42_PAGE_25 + 0x06) -#define CS42L42_SPDIF_SW_CTL1 (CS42L42_PAGE_25 + 0x07) - -/* Page 0x26 SRC Registers */ -#define CS42L42_SRC_SDIN_FS (CS42L42_PAGE_26 + 0x01) -#define CS42L42_SRC_SDIN_FS_SHIFT 0 -#define CS42L42_SRC_SDIN_FS_MASK (0x1f << CS42L42_SRC_SDIN_FS_SHIFT) - -#define CS42L42_SRC_SDOUT_FS (CS42L42_PAGE_26 + 0x09) - -/* Page 0x28 S/PDIF Registers */ -#define CS42L42_SPDIF_CTL1 (CS42L42_PAGE_28 + 0x01) -#define CS42L42_SPDIF_CTL2 (CS42L42_PAGE_28 + 0x02) -#define CS42L42_SPDIF_CTL3 (CS42L42_PAGE_28 + 0x03) -#define CS42L42_SPDIF_CTL4 (CS42L42_PAGE_28 + 0x04) - -/* Page 0x29 Serial Port TX Registers */ -#define CS42L42_ASP_TX_SZ_EN (CS42L42_PAGE_29 + 0x01) -#define CS42L42_ASP_TX_EN_SHIFT 0 -#define CS42L42_ASP_TX_CH_EN (CS42L42_PAGE_29 + 0x02) -#define CS42L42_ASP_TX0_CH2_SHIFT 1 -#define CS42L42_ASP_TX0_CH1_SHIFT 0 - -#define CS42L42_ASP_TX_CH_AP_RES (CS42L42_PAGE_29 + 0x03) -#define CS42L42_ASP_TX_CH1_AP_SHIFT 7 -#define CS42L42_ASP_TX_CH1_AP_MASK (1 << CS42L42_ASP_TX_CH1_AP_SHIFT) -#define CS42L42_ASP_TX_CH2_AP_SHIFT 6 -#define CS42L42_ASP_TX_CH2_AP_MASK (1 << CS42L42_ASP_TX_CH2_AP_SHIFT) -#define CS42L42_ASP_TX_CH2_RES_SHIFT 2 -#define CS42L42_ASP_TX_CH2_RES_MASK (3 << CS42L42_ASP_TX_CH2_RES_SHIFT) -#define CS42L42_ASP_TX_CH1_RES_SHIFT 0 -#define CS42L42_ASP_TX_CH1_RES_MASK (3 << CS42L42_ASP_TX_CH1_RES_SHIFT) -#define CS42L42_ASP_TX_CH1_BIT_MSB (CS42L42_PAGE_29 + 0x04) -#define CS42L42_ASP_TX_CH1_BIT_LSB (CS42L42_PAGE_29 + 0x05) -#define CS42L42_ASP_TX_HIZ_DLY_CFG (CS42L42_PAGE_29 + 0x06) -#define CS42L42_ASP_TX_CH2_BIT_MSB (CS42L42_PAGE_29 + 0x0A) -#define CS42L42_ASP_TX_CH2_BIT_LSB (CS42L42_PAGE_29 + 0x0B) - -/* Page 0x2A Serial Port RX Registers */ -#define CS42L42_ASP_RX_DAI0_EN (CS42L42_PAGE_2A + 0x01) -#define CS42L42_ASP_RX0_CH_EN_SHIFT 2 -#define CS42L42_ASP_RX0_CH_EN_MASK (0xf << CS42L42_ASP_RX0_CH_EN_SHIFT) -#define CS42L42_ASP_RX0_CH1_SHIFT 2 -#define CS42L42_ASP_RX0_CH2_SHIFT 3 -#define CS42L42_ASP_RX0_CH3_SHIFT 4 -#define CS42L42_ASP_RX0_CH4_SHIFT 5 - -#define CS42L42_ASP_RX_DAI0_CH1_AP_RES (CS42L42_PAGE_2A + 0x02) -#define CS42L42_ASP_RX_DAI0_CH1_BIT_MSB (CS42L42_PAGE_2A + 0x03) -#define CS42L42_ASP_RX_DAI0_CH1_BIT_LSB (CS42L42_PAGE_2A + 0x04) -#define CS42L42_ASP_RX_DAI0_CH2_AP_RES (CS42L42_PAGE_2A + 0x05) -#define CS42L42_ASP_RX_DAI0_CH2_BIT_MSB (CS42L42_PAGE_2A + 0x06) -#define CS42L42_ASP_RX_DAI0_CH2_BIT_LSB (CS42L42_PAGE_2A + 0x07) -#define CS42L42_ASP_RX_DAI0_CH3_AP_RES (CS42L42_PAGE_2A + 0x08) -#define CS42L42_ASP_RX_DAI0_CH3_BIT_MSB (CS42L42_PAGE_2A + 0x09) -#define CS42L42_ASP_RX_DAI0_CH3_BIT_LSB (CS42L42_PAGE_2A + 0x0A) -#define CS42L42_ASP_RX_DAI0_CH4_AP_RES (CS42L42_PAGE_2A + 0x0B) -#define CS42L42_ASP_RX_DAI0_CH4_BIT_MSB (CS42L42_PAGE_2A + 0x0C) -#define CS42L42_ASP_RX_DAI0_CH4_BIT_LSB (CS42L42_PAGE_2A + 0x0D) -#define CS42L42_ASP_RX_DAI1_CH1_AP_RES (CS42L42_PAGE_2A + 0x0E) -#define CS42L42_ASP_RX_DAI1_CH1_BIT_MSB (CS42L42_PAGE_2A + 0x0F) -#define CS42L42_ASP_RX_DAI1_CH1_BIT_LSB (CS42L42_PAGE_2A + 0x10) -#define CS42L42_ASP_RX_DAI1_CH2_AP_RES (CS42L42_PAGE_2A + 0x11) -#define CS42L42_ASP_RX_DAI1_CH2_BIT_MSB (CS42L42_PAGE_2A + 0x12) -#define CS42L42_ASP_RX_DAI1_CH2_BIT_LSB (CS42L42_PAGE_2A + 0x13) - -#define CS42L42_ASP_RX_CH_AP_SHIFT 6 -#define CS42L42_ASP_RX_CH_AP_MASK (1 << CS42L42_ASP_RX_CH_AP_SHIFT) -#define CS42L42_ASP_RX_CH_AP_LOW 0 -#define CS42L42_ASP_RX_CH_AP_HI 1 -#define CS42L42_ASP_RX_CH_RES_SHIFT 0 -#define CS42L42_ASP_RX_CH_RES_MASK (3 << CS42L42_ASP_RX_CH_RES_SHIFT) -#define CS42L42_ASP_RX_CH_RES_32 3 -#define CS42L42_ASP_RX_CH_RES_16 1 -#define CS42L42_ASP_RX_CH_BIT_ST_SHIFT 0 -#define CS42L42_ASP_RX_CH_BIT_ST_MASK (0xff << CS42L42_ASP_RX_CH_BIT_ST_SHIFT) - -/* Page 0x30 ID Registers */ -#define CS42L42_SUB_REVID (CS42L42_PAGE_30 + 0x14) -#define CS42L42_MAX_REGISTER (CS42L42_PAGE_30 + 0x14) - -/* Defines for fracturing values spread across multiple registers */ -#define CS42L42_FRAC0_VAL(val) ((val) & 0x0000ff) -#define CS42L42_FRAC1_VAL(val) (((val) & 0x00ff00) >> 8) -#define CS42L42_FRAC2_VAL(val) (((val) & 0xff0000) >> 16) - -#define CS42L42_NUM_SUPPLIES 5 -#define CS42L42_BOOT_TIME_US 3000 -#define CS42L42_PLL_DIVOUT_TIME_US 800 -#define CS42L42_CLOCK_SWITCH_DELAY_US 150 -#define CS42L42_PLL_LOCK_POLL_US 250 -#define CS42L42_PLL_LOCK_TIMEOUT_US 1250 -#define CS42L42_HP_ADC_EN_TIME_US 20000 -#define CS42L42_PDN_DONE_POLL_US 1000 -#define CS42L42_PDN_DONE_TIMEOUT_US 200000 -#define CS42L42_PDN_DONE_TIME_MS 100 -#define CS42L42_FILT_DISCHARGE_TIME_MS 46 +#include <sound/cs42l42.h> static const char *const cs42l42_supply_names[CS42L42_NUM_SUPPLIES] = { "VA", diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 9cfd4f18493f..6d7fd88243aa 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -97,13 +97,13 @@ struct wm_adsp_system_config_xm_hdr { __be32 wdma[8]; __be32 build_job_name[3]; __be32 build_job_number; -}; +} __packed; struct wm_halo_system_config_xm_hdr { __be32 halo_heartbeat; __be32 build_job_name[3]; __be32 build_job_number; -}; +} __packed; struct wm_adsp_alg_xm_struct { __be32 magic; @@ -114,13 +114,13 @@ struct wm_adsp_alg_xm_struct { __be32 high_water_mark; __be32 low_water_mark; __be64 smoothed_power; -}; +} __packed; struct wm_adsp_host_buf_coeff_v1 { __be32 host_buf_ptr; /* Host buffer pointer */ __be32 versions; /* Version numbers */ __be32 name[4]; /* The buffer name */ -}; +} __packed; struct wm_adsp_buffer { __be32 buf1_base; /* Base addr of first buffer area */ @@ -141,7 +141,7 @@ struct wm_adsp_buffer { __be32 min_free; /* min free space since stream start */ __be32 blocks_written[2]; /* total blocks written (64 bit) */ __be32 words_written[2]; /* total words written (64 bit) */ -}; +} __packed; struct wm_adsp_compr; diff --git a/sound/soc/pxa/corgi.c b/sound/soc/pxa/corgi.c index 8ee2dea25a8d..4489d2c8b124 100644 --- a/sound/soc/pxa/corgi.c +++ b/sound/soc/pxa/corgi.c @@ -21,8 +21,7 @@ #include <sound/soc.h> #include <asm/mach-types.h> -#include <mach/corgi.h> -#include <mach/audio.h> +#include <linux/platform_data/asoc-pxa.h> #include "../codecs/wm8731.h" #include "pxa2xx-i2s.h" @@ -41,6 +40,9 @@ static int corgi_jack_func; static int corgi_spk_func; +static struct gpio_desc *gpiod_mute_l, *gpiod_mute_r, + *gpiod_apm_on, *gpiod_mic_bias; + static void corgi_ext_control(struct snd_soc_dapm_context *dapm) { snd_soc_dapm_mutex_lock(dapm); @@ -49,8 +51,8 @@ static void corgi_ext_control(struct snd_soc_dapm_context *dapm) switch (corgi_jack_func) { case CORGI_HP: /* set = unmute headphone */ - gpio_set_value(CORGI_GPIO_MUTE_L, 1); - gpio_set_value(CORGI_GPIO_MUTE_R, 1); + gpiod_set_value(gpiod_mute_l, 1); + gpiod_set_value(gpiod_mute_r, 1); snd_soc_dapm_disable_pin_unlocked(dapm, "Mic Jack"); snd_soc_dapm_disable_pin_unlocked(dapm, "Line Jack"); snd_soc_dapm_enable_pin_unlocked(dapm, "Headphone Jack"); @@ -58,24 +60,24 @@ static void corgi_ext_control(struct snd_soc_dapm_context *dapm) break; case CORGI_MIC: /* reset = mute headphone */ - gpio_set_value(CORGI_GPIO_MUTE_L, 0); - gpio_set_value(CORGI_GPIO_MUTE_R, 0); + gpiod_set_value(gpiod_mute_l, 0); + gpiod_set_value(gpiod_mute_r, 0); snd_soc_dapm_enable_pin_unlocked(dapm, "Mic Jack"); snd_soc_dapm_disable_pin_unlocked(dapm, "Line Jack"); snd_soc_dapm_disable_pin_unlocked(dapm, "Headphone Jack"); snd_soc_dapm_disable_pin_unlocked(dapm, "Headset Jack"); break; case CORGI_LINE: - gpio_set_value(CORGI_GPIO_MUTE_L, 0); - gpio_set_value(CORGI_GPIO_MUTE_R, 0); + gpiod_set_value(gpiod_mute_l, 0); + gpiod_set_value(gpiod_mute_r, 0); snd_soc_dapm_disable_pin_unlocked(dapm, "Mic Jack"); snd_soc_dapm_enable_pin_unlocked(dapm, "Line Jack"); snd_soc_dapm_disable_pin_unlocked(dapm, "Headphone Jack"); snd_soc_dapm_disable_pin_unlocked(dapm, "Headset Jack"); break; case CORGI_HEADSET: - gpio_set_value(CORGI_GPIO_MUTE_L, 0); - gpio_set_value(CORGI_GPIO_MUTE_R, 1); + gpiod_set_value(gpiod_mute_l, 0); + gpiod_set_value(gpiod_mute_r, 1); snd_soc_dapm_enable_pin_unlocked(dapm, "Mic Jack"); snd_soc_dapm_disable_pin_unlocked(dapm, "Line Jack"); snd_soc_dapm_disable_pin_unlocked(dapm, "Headphone Jack"); @@ -108,8 +110,8 @@ static int corgi_startup(struct snd_pcm_substream *substream) static void corgi_shutdown(struct snd_pcm_substream *substream) { /* set = unmute headphone */ - gpio_set_value(CORGI_GPIO_MUTE_L, 1); - gpio_set_value(CORGI_GPIO_MUTE_R, 1); + gpiod_set_value(gpiod_mute_l, 1); + gpiod_set_value(gpiod_mute_r, 1); } static int corgi_hw_params(struct snd_pcm_substream *substream, @@ -199,14 +201,14 @@ static int corgi_set_spk(struct snd_kcontrol *kcontrol, static int corgi_amp_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event) { - gpio_set_value(CORGI_GPIO_APM_ON, SND_SOC_DAPM_EVENT_ON(event)); + gpiod_set_value(gpiod_apm_on, SND_SOC_DAPM_EVENT_ON(event)); return 0; } static int corgi_mic_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event) { - gpio_set_value(CORGI_GPIO_MIC_BIAS, SND_SOC_DAPM_EVENT_ON(event)); + gpiod_set_value(gpiod_mic_bias, SND_SOC_DAPM_EVENT_ON(event)); return 0; } @@ -293,6 +295,19 @@ static int corgi_probe(struct platform_device *pdev) card->dev = &pdev->dev; + gpiod_mute_l = devm_gpiod_get(&pdev->dev, "mute-l", GPIOD_OUT_HIGH); + if (IS_ERR(gpiod_mute_l)) + return PTR_ERR(gpiod_mute_l); + gpiod_mute_r = devm_gpiod_get(&pdev->dev, "mute-r", GPIOD_OUT_HIGH); + if (IS_ERR(gpiod_mute_r)) + return PTR_ERR(gpiod_mute_r); + gpiod_apm_on = devm_gpiod_get(&pdev->dev, "apm-on", GPIOD_OUT_LOW); + if (IS_ERR(gpiod_apm_on)) + return PTR_ERR(gpiod_apm_on); + gpiod_mic_bias = devm_gpiod_get(&pdev->dev, "mic-bias", GPIOD_OUT_LOW); + if (IS_ERR(gpiod_mic_bias)) + return PTR_ERR(gpiod_mic_bias); + ret = devm_snd_soc_register_card(&pdev->dev, card); if (ret) dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", diff --git a/sound/soc/pxa/e740_wm9705.c b/sound/soc/pxa/e740_wm9705.c index eafa1482afbe..4e0e9b778d4c 100644 --- a/sound/soc/pxa/e740_wm9705.c +++ b/sound/soc/pxa/e740_wm9705.c @@ -7,17 +7,19 @@ #include <linux/module.h> #include <linux/moduleparam.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <sound/core.h> #include <sound/pcm.h> #include <sound/soc.h> -#include <mach/audio.h> -#include <mach/eseries-gpio.h> +#include <linux/platform_data/asoc-pxa.h> #include <asm/mach-types.h> +static struct gpio_desc *gpiod_output_amp, *gpiod_input_amp; +static struct gpio_desc *gpiod_audio_power; + #define E740_AUDIO_OUT 1 #define E740_AUDIO_IN 2 @@ -25,9 +27,9 @@ static int e740_audio_power; static void e740_sync_audio_power(int status) { - gpio_set_value(GPIO_E740_WM9705_nAVDD2, !status); - gpio_set_value(GPIO_E740_AMP_ON, (status & E740_AUDIO_OUT) ? 1 : 0); - gpio_set_value(GPIO_E740_MIC_ON, (status & E740_AUDIO_IN) ? 1 : 0); + gpiod_set_value(gpiod_audio_power, !status); + gpiod_set_value(gpiod_output_amp, (status & E740_AUDIO_OUT) ? 1 : 0); + gpiod_set_value(gpiod_input_amp, (status & E740_AUDIO_IN) ? 1 : 0); } static int e740_mic_amp_event(struct snd_soc_dapm_widget *w, @@ -116,36 +118,35 @@ static struct snd_soc_card e740 = { .fully_routed = true, }; -static struct gpio e740_audio_gpios[] = { - { GPIO_E740_MIC_ON, GPIOF_OUT_INIT_LOW, "Mic amp" }, - { GPIO_E740_AMP_ON, GPIOF_OUT_INIT_LOW, "Output amp" }, - { GPIO_E740_WM9705_nAVDD2, GPIOF_OUT_INIT_HIGH, "Audio power" }, -}; - static int e740_probe(struct platform_device *pdev) { struct snd_soc_card *card = &e740; int ret; - ret = gpio_request_array(e740_audio_gpios, - ARRAY_SIZE(e740_audio_gpios)); + gpiod_input_amp = devm_gpiod_get(&pdev->dev, "Mic amp", GPIOD_OUT_LOW); + ret = PTR_ERR_OR_ZERO(gpiod_input_amp); + if (ret) + return ret; + gpiod_output_amp = devm_gpiod_get(&pdev->dev, "Output amp", GPIOD_OUT_LOW); + ret = PTR_ERR_OR_ZERO(gpiod_output_amp); + if (ret) + return ret; + gpiod_audio_power = devm_gpiod_get(&pdev->dev, "Audio power", GPIOD_OUT_HIGH); + ret = PTR_ERR_OR_ZERO(gpiod_audio_power); if (ret) return ret; card->dev = &pdev->dev; ret = devm_snd_soc_register_card(&pdev->dev, card); - if (ret) { + if (ret) dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret); - gpio_free_array(e740_audio_gpios, ARRAY_SIZE(e740_audio_gpios)); - } return ret; } static int e740_remove(struct platform_device *pdev) { - gpio_free_array(e740_audio_gpios, ARRAY_SIZE(e740_audio_gpios)); return 0; } diff --git a/sound/soc/pxa/e750_wm9705.c b/sound/soc/pxa/e750_wm9705.c index d75510d7b16b..7a1e0d8bfd11 100644 --- a/sound/soc/pxa/e750_wm9705.c +++ b/sound/soc/pxa/e750_wm9705.c @@ -7,24 +7,25 @@ #include <linux/module.h> #include <linux/moduleparam.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <sound/core.h> #include <sound/pcm.h> #include <sound/soc.h> -#include <mach/audio.h> -#include <mach/eseries-gpio.h> +#include <linux/platform_data/asoc-pxa.h> #include <asm/mach-types.h> +static struct gpio_desc *gpiod_spk_amp, *gpiod_hp_amp; + static int e750_spk_amp_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { if (event & SND_SOC_DAPM_PRE_PMU) - gpio_set_value(GPIO_E750_SPK_AMP_OFF, 0); + gpiod_set_value(gpiod_spk_amp, 1); else if (event & SND_SOC_DAPM_POST_PMD) - gpio_set_value(GPIO_E750_SPK_AMP_OFF, 1); + gpiod_set_value(gpiod_spk_amp, 0); return 0; } @@ -33,9 +34,9 @@ static int e750_hp_amp_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { if (event & SND_SOC_DAPM_PRE_PMU) - gpio_set_value(GPIO_E750_HP_AMP_OFF, 0); + gpiod_set_value(gpiod_hp_amp, 1); else if (event & SND_SOC_DAPM_POST_PMD) - gpio_set_value(GPIO_E750_HP_AMP_OFF, 1); + gpiod_set_value(gpiod_hp_amp, 0); return 0; } @@ -100,35 +101,31 @@ static struct snd_soc_card e750 = { .fully_routed = true, }; -static struct gpio e750_audio_gpios[] = { - { GPIO_E750_HP_AMP_OFF, GPIOF_OUT_INIT_HIGH, "Headphone amp" }, - { GPIO_E750_SPK_AMP_OFF, GPIOF_OUT_INIT_HIGH, "Speaker amp" }, -}; - static int e750_probe(struct platform_device *pdev) { struct snd_soc_card *card = &e750; int ret; - ret = gpio_request_array(e750_audio_gpios, - ARRAY_SIZE(e750_audio_gpios)); + gpiod_hp_amp = devm_gpiod_get(&pdev->dev, "Headphone amp", GPIOD_OUT_LOW); + ret = PTR_ERR_OR_ZERO(gpiod_hp_amp); + if (ret) + return ret; + gpiod_spk_amp = devm_gpiod_get(&pdev->dev, "Speaker amp", GPIOD_OUT_LOW); + ret = PTR_ERR_OR_ZERO(gpiod_spk_amp); if (ret) return ret; card->dev = &pdev->dev; ret = devm_snd_soc_register_card(&pdev->dev, card); - if (ret) { + if (ret) dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret); - gpio_free_array(e750_audio_gpios, ARRAY_SIZE(e750_audio_gpios)); - } return ret; } static int e750_remove(struct platform_device *pdev) { - gpio_free_array(e750_audio_gpios, ARRAY_SIZE(e750_audio_gpios)); return 0; } diff --git a/sound/soc/pxa/e800_wm9712.c b/sound/soc/pxa/e800_wm9712.c index 56d543da938a..a39c494127cf 100644 --- a/sound/soc/pxa/e800_wm9712.c +++ b/sound/soc/pxa/e800_wm9712.c @@ -7,23 +7,24 @@ #include <linux/module.h> #include <linux/moduleparam.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <sound/core.h> #include <sound/pcm.h> #include <sound/soc.h> #include <asm/mach-types.h> -#include <mach/audio.h> -#include <mach/eseries-gpio.h> +#include <linux/platform_data/asoc-pxa.h> + +static struct gpio_desc *gpiod_spk_amp, *gpiod_hp_amp; static int e800_spk_amp_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { if (event & SND_SOC_DAPM_PRE_PMU) - gpio_set_value(GPIO_E800_SPK_AMP_ON, 1); + gpiod_set_value(gpiod_spk_amp, 1); else if (event & SND_SOC_DAPM_POST_PMD) - gpio_set_value(GPIO_E800_SPK_AMP_ON, 0); + gpiod_set_value(gpiod_spk_amp, 0); return 0; } @@ -32,9 +33,9 @@ static int e800_hp_amp_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { if (event & SND_SOC_DAPM_PRE_PMU) - gpio_set_value(GPIO_E800_HP_AMP_OFF, 0); + gpiod_set_value(gpiod_hp_amp, 1); else if (event & SND_SOC_DAPM_POST_PMD) - gpio_set_value(GPIO_E800_HP_AMP_OFF, 1); + gpiod_set_value(gpiod_hp_amp, 0); return 0; } @@ -100,35 +101,31 @@ static struct snd_soc_card e800 = { .num_dapm_routes = ARRAY_SIZE(audio_map), }; -static struct gpio e800_audio_gpios[] = { - { GPIO_E800_SPK_AMP_ON, GPIOF_OUT_INIT_HIGH, "Headphone amp" }, - { GPIO_E800_HP_AMP_OFF, GPIOF_OUT_INIT_HIGH, "Speaker amp" }, -}; - static int e800_probe(struct platform_device *pdev) { struct snd_soc_card *card = &e800; int ret; - ret = gpio_request_array(e800_audio_gpios, - ARRAY_SIZE(e800_audio_gpios)); + gpiod_hp_amp = devm_gpiod_get(&pdev->dev, "Headphone amp", GPIOD_OUT_LOW); + ret = PTR_ERR_OR_ZERO(gpiod_hp_amp); + if (ret) + return ret; + gpiod_spk_amp = devm_gpiod_get(&pdev->dev, "Speaker amp", GPIOD_OUT_LOW); + ret = PTR_ERR_OR_ZERO(gpiod_spk_amp); if (ret) return ret; card->dev = &pdev->dev; ret = devm_snd_soc_register_card(&pdev->dev, card); - if (ret) { + if (ret) dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret); - gpio_free_array(e800_audio_gpios, ARRAY_SIZE(e800_audio_gpios)); - } return ret; } static int e800_remove(struct platform_device *pdev) { - gpio_free_array(e800_audio_gpios, ARRAY_SIZE(e800_audio_gpios)); return 0; } diff --git a/sound/soc/pxa/em-x270.c b/sound/soc/pxa/em-x270.c index 9076ea7e9339..b59ec22e1e7e 100644 --- a/sound/soc/pxa/em-x270.c +++ b/sound/soc/pxa/em-x270.c @@ -23,7 +23,7 @@ #include <sound/soc.h> #include <asm/mach-types.h> -#include <mach/audio.h> +#include <linux/platform_data/asoc-pxa.h> SND_SOC_DAILINK_DEFS(ac97, DAILINK_COMP_ARRAY(COMP_CPU("pxa2xx-ac97")), diff --git a/sound/soc/pxa/hx4700.c b/sound/soc/pxa/hx4700.c index 9a816156f012..a323ddb8fc3e 100644 --- a/sound/soc/pxa/hx4700.c +++ b/sound/soc/pxa/hx4700.c @@ -10,7 +10,7 @@ #include <linux/interrupt.h> #include <linux/platform_device.h> #include <linux/delay.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <sound/core.h> #include <sound/jack.h> @@ -18,10 +18,10 @@ #include <sound/pcm_params.h> #include <sound/soc.h> -#include <mach/hx4700.h> #include <asm/mach-types.h> #include "pxa2xx-i2s.h" +static struct gpio_desc *gpiod_hp_driver, *gpiod_spk_sd; static struct snd_soc_jack hs_jack; /* Headphones jack detection DAPM pin */ @@ -29,20 +29,18 @@ static struct snd_soc_jack_pin hs_jack_pin[] = { { .pin = "Headphone Jack", .mask = SND_JACK_HEADPHONE, + .invert = 1, }, { .pin = "Speaker", /* disable speaker when hp jack is inserted */ .mask = SND_JACK_HEADPHONE, - .invert = 1, }, }; /* Headphones jack detection GPIO */ static struct snd_soc_jack_gpio hs_jack_gpio = { - .gpio = GPIO75_HX4700_EARPHONE_nDET, - .invert = true, - .name = "hp-gpio", + .name = "earphone-det", .report = SND_JACK_HEADPHONE, .debounce_time = 200, }; @@ -81,14 +79,14 @@ static const struct snd_soc_ops hx4700_ops = { static int hx4700_spk_power(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event) { - gpio_set_value(GPIO107_HX4700_SPK_nSD, !!SND_SOC_DAPM_EVENT_ON(event)); + gpiod_set_value(gpiod_spk_sd, !SND_SOC_DAPM_EVENT_ON(event)); return 0; } static int hx4700_hp_power(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event) { - gpio_set_value(GPIO92_HX4700_HP_DRIVER, !!SND_SOC_DAPM_EVENT_ON(event)); + gpiod_set_value(gpiod_hp_driver, !!SND_SOC_DAPM_EVENT_ON(event)); return 0; } @@ -162,11 +160,6 @@ static struct snd_soc_card snd_soc_card_hx4700 = { .fully_routed = true, }; -static struct gpio hx4700_audio_gpios[] = { - { GPIO107_HX4700_SPK_nSD, GPIOF_OUT_INIT_HIGH, "SPK_POWER" }, - { GPIO92_HX4700_HP_DRIVER, GPIOF_OUT_INIT_LOW, "EP_POWER" }, -}; - static int hx4700_audio_probe(struct platform_device *pdev) { int ret; @@ -174,26 +167,26 @@ static int hx4700_audio_probe(struct platform_device *pdev) if (!machine_is_h4700()) return -ENODEV; - ret = gpio_request_array(hx4700_audio_gpios, - ARRAY_SIZE(hx4700_audio_gpios)); + gpiod_hp_driver = devm_gpiod_get(&pdev->dev, "hp-driver", GPIOD_ASIS); + ret = PTR_ERR_OR_ZERO(gpiod_hp_driver); + if (ret) + return ret; + gpiod_spk_sd = devm_gpiod_get(&pdev->dev, "spk-sd", GPIOD_ASIS); + ret = PTR_ERR_OR_ZERO(gpiod_spk_sd); if (ret) return ret; + hs_jack_gpio.gpiod_dev = &pdev->dev; snd_soc_card_hx4700.dev = &pdev->dev; ret = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_hx4700); - if (ret) - gpio_free_array(hx4700_audio_gpios, - ARRAY_SIZE(hx4700_audio_gpios)); return ret; } static int hx4700_audio_remove(struct platform_device *pdev) { - gpio_set_value(GPIO92_HX4700_HP_DRIVER, 0); - gpio_set_value(GPIO107_HX4700_SPK_nSD, 0); - - gpio_free_array(hx4700_audio_gpios, ARRAY_SIZE(hx4700_audio_gpios)); + gpiod_set_value(gpiod_hp_driver, 0); + gpiod_set_value(gpiod_spk_sd, 0); return 0; } diff --git a/sound/soc/pxa/magician.c b/sound/soc/pxa/magician.c index a5f326c97af2..9433cc927755 100644 --- a/sound/soc/pxa/magician.c +++ b/sound/soc/pxa/magician.c @@ -14,16 +14,14 @@ #include <linux/interrupt.h> #include <linux/platform_device.h> #include <linux/delay.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/i2c.h> #include <sound/core.h> #include <sound/pcm.h> #include <sound/pcm_params.h> #include <sound/soc.h> -#include <sound/uda1380.h> -#include <mach/magician.h> #include <asm/mach-types.h> #include "../codecs/uda1380.h" #include "pxa2xx-i2s.h" @@ -36,6 +34,9 @@ static int magician_hp_switch; static int magician_spk_switch = 1; static int magician_in_sel = MAGICIAN_MIC; +static struct gpio_desc *gpiod_spk_power, *gpiod_ep_power, *gpiod_mic_power; +static struct gpio_desc *gpiod_in_sel0, *gpiod_in_sel1; + static void magician_ext_control(struct snd_soc_dapm_context *dapm) { @@ -215,10 +216,10 @@ static int magician_set_input(struct snd_kcontrol *kcontrol, switch (magician_in_sel) { case MAGICIAN_MIC: - gpio_set_value(EGPIO_MAGICIAN_IN_SEL1, 1); + gpiod_set_value(gpiod_in_sel1, 1); break; case MAGICIAN_MIC_EXT: - gpio_set_value(EGPIO_MAGICIAN_IN_SEL1, 0); + gpiod_set_value(gpiod_in_sel1, 0); } return 1; @@ -227,21 +228,21 @@ static int magician_set_input(struct snd_kcontrol *kcontrol, static int magician_spk_power(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event) { - gpio_set_value(EGPIO_MAGICIAN_SPK_POWER, SND_SOC_DAPM_EVENT_ON(event)); + gpiod_set_value(gpiod_spk_power, SND_SOC_DAPM_EVENT_ON(event)); return 0; } static int magician_hp_power(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event) { - gpio_set_value(EGPIO_MAGICIAN_EP_POWER, SND_SOC_DAPM_EVENT_ON(event)); + gpiod_set_value(gpiod_ep_power, SND_SOC_DAPM_EVENT_ON(event)); return 0; } static int magician_mic_bias(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event) { - gpio_set_value(EGPIO_MAGICIAN_MIC_POWER, SND_SOC_DAPM_EVENT_ON(event)); + gpiod_set_value(gpiod_mic_power, SND_SOC_DAPM_EVENT_ON(event)); return 0; } @@ -328,106 +329,38 @@ static struct snd_soc_card snd_soc_card_magician = { .fully_routed = true, }; -static struct platform_device *magician_snd_device; - -/* - * FIXME: move into magician board file once merged into the pxa tree - */ -static struct uda1380_platform_data uda1380_info = { - .gpio_power = EGPIO_MAGICIAN_CODEC_POWER, - .gpio_reset = EGPIO_MAGICIAN_CODEC_RESET, - .dac_clk = UDA1380_DAC_CLK_WSPLL, -}; - -static struct i2c_board_info i2c_board_info[] = { - { - I2C_BOARD_INFO("uda1380", 0x18), - .platform_data = &uda1380_info, - }, -}; - -static int __init magician_init(void) -{ - int ret; - struct i2c_adapter *adapter; - struct i2c_client *client; - - if (!machine_is_magician()) - return -ENODEV; - - adapter = i2c_get_adapter(0); - if (!adapter) - return -ENODEV; - client = i2c_new_client_device(adapter, i2c_board_info); - i2c_put_adapter(adapter); - if (IS_ERR(client)) - return PTR_ERR(client); - - ret = gpio_request(EGPIO_MAGICIAN_SPK_POWER, "SPK_POWER"); - if (ret) - goto err_request_spk; - ret = gpio_request(EGPIO_MAGICIAN_EP_POWER, "EP_POWER"); - if (ret) - goto err_request_ep; - ret = gpio_request(EGPIO_MAGICIAN_MIC_POWER, "MIC_POWER"); - if (ret) - goto err_request_mic; - ret = gpio_request(EGPIO_MAGICIAN_IN_SEL0, "IN_SEL0"); - if (ret) - goto err_request_in_sel0; - ret = gpio_request(EGPIO_MAGICIAN_IN_SEL1, "IN_SEL1"); - if (ret) - goto err_request_in_sel1; - - gpio_set_value(EGPIO_MAGICIAN_IN_SEL0, 0); - - magician_snd_device = platform_device_alloc("soc-audio", -1); - if (!magician_snd_device) { - ret = -ENOMEM; - goto err_pdev; - } - - platform_set_drvdata(magician_snd_device, &snd_soc_card_magician); - ret = platform_device_add(magician_snd_device); - if (ret) { - platform_device_put(magician_snd_device); - goto err_pdev; - } - - return 0; - -err_pdev: - gpio_free(EGPIO_MAGICIAN_IN_SEL1); -err_request_in_sel1: - gpio_free(EGPIO_MAGICIAN_IN_SEL0); -err_request_in_sel0: - gpio_free(EGPIO_MAGICIAN_MIC_POWER); -err_request_mic: - gpio_free(EGPIO_MAGICIAN_EP_POWER); -err_request_ep: - gpio_free(EGPIO_MAGICIAN_SPK_POWER); -err_request_spk: - return ret; -} - -static void __exit magician_exit(void) +static int magician_audio_probe(struct platform_device *pdev) { - platform_device_unregister(magician_snd_device); - - gpio_set_value(EGPIO_MAGICIAN_SPK_POWER, 0); - gpio_set_value(EGPIO_MAGICIAN_EP_POWER, 0); - gpio_set_value(EGPIO_MAGICIAN_MIC_POWER, 0); - - gpio_free(EGPIO_MAGICIAN_IN_SEL1); - gpio_free(EGPIO_MAGICIAN_IN_SEL0); - gpio_free(EGPIO_MAGICIAN_MIC_POWER); - gpio_free(EGPIO_MAGICIAN_EP_POWER); - gpio_free(EGPIO_MAGICIAN_SPK_POWER); + struct device *dev = &pdev->dev; + + gpiod_spk_power = devm_gpiod_get(dev, "SPK_POWER", GPIOD_OUT_LOW); + if (IS_ERR(gpiod_spk_power)) + return PTR_ERR(gpiod_spk_power); + gpiod_ep_power = devm_gpiod_get(dev, "EP_POWER", GPIOD_OUT_LOW); + if (IS_ERR(gpiod_ep_power)) + return PTR_ERR(gpiod_ep_power); + gpiod_mic_power = devm_gpiod_get(dev, "MIC_POWER", GPIOD_OUT_LOW); + if (IS_ERR(gpiod_mic_power)) + return PTR_ERR(gpiod_mic_power); + gpiod_in_sel0 = devm_gpiod_get(dev, "IN_SEL0", GPIOD_OUT_HIGH); + if (IS_ERR(gpiod_in_sel0)) + return PTR_ERR(gpiod_in_sel0); + gpiod_in_sel1 = devm_gpiod_get(dev, "IN_SEL1", GPIOD_OUT_LOW); + if (IS_ERR(gpiod_in_sel1)) + return PTR_ERR(gpiod_in_sel1); + + snd_soc_card_magician.dev = &pdev->dev; + return devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_magician); } -module_init(magician_init); -module_exit(magician_exit); +static struct platform_driver magician_audio_driver = { + .driver.name = "magician-audio", + .driver.pm = &snd_soc_pm_ops, + .probe = magician_audio_probe, +}; +module_platform_driver(magician_audio_driver); MODULE_AUTHOR("Philipp Zabel"); MODULE_DESCRIPTION("ALSA SoC Magician"); MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:magician-audio"); diff --git a/sound/soc/pxa/mioa701_wm9713.c b/sound/soc/pxa/mioa701_wm9713.c index 763db7bbd9bb..0fa37637eca9 100644 --- a/sound/soc/pxa/mioa701_wm9713.c +++ b/sound/soc/pxa/mioa701_wm9713.c @@ -33,7 +33,7 @@ #include <linux/platform_device.h> #include <asm/mach-types.h> -#include <mach/audio.h> +#include <linux/platform_data/asoc-pxa.h> #include <sound/core.h> #include <sound/pcm.h> diff --git a/sound/soc/pxa/palm27x.c b/sound/soc/pxa/palm27x.c index 65257f7fe4c4..a2321c01c160 100644 --- a/sound/soc/pxa/palm27x.c +++ b/sound/soc/pxa/palm27x.c @@ -20,7 +20,7 @@ #include <sound/jack.h> #include <asm/mach-types.h> -#include <mach/audio.h> +#include <linux/platform_data/asoc-pxa.h> #include <linux/platform_data/asoc-palm27x.h> static struct snd_soc_jack hs_jack; diff --git a/sound/soc/pxa/poodle.c b/sound/soc/pxa/poodle.c index 323ba3e23039..5fdaa477e85d 100644 --- a/sound/soc/pxa/poodle.c +++ b/sound/soc/pxa/poodle.c @@ -21,8 +21,8 @@ #include <asm/mach-types.h> #include <asm/hardware/locomo.h> -#include <mach/poodle.h> -#include <mach/audio.h> +#include <linux/platform_data/asoc-pxa.h> +#include <linux/platform_data/asoc-poodle.h> #include "../codecs/wm8731.h" #include "pxa2xx-i2s.h" @@ -38,21 +38,23 @@ static int poodle_jack_func; static int poodle_spk_func; +static struct poodle_audio_platform_data *poodle_pdata; + static void poodle_ext_control(struct snd_soc_dapm_context *dapm) { /* set up jack connection */ if (poodle_jack_func == POODLE_HP) { /* set = unmute headphone */ - locomo_gpio_write(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_MUTE_L, 1); - locomo_gpio_write(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_MUTE_R, 1); + locomo_gpio_write(poodle_pdata->locomo_dev, + poodle_pdata->gpio_mute_l, 1); + locomo_gpio_write(poodle_pdata->locomo_dev, + poodle_pdata->gpio_mute_r, 1); snd_soc_dapm_enable_pin(dapm, "Headphone Jack"); } else { - locomo_gpio_write(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_MUTE_L, 0); - locomo_gpio_write(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_MUTE_R, 0); + locomo_gpio_write(poodle_pdata->locomo_dev, + poodle_pdata->gpio_mute_l, 0); + locomo_gpio_write(poodle_pdata->locomo_dev, + poodle_pdata->gpio_mute_r, 0); snd_soc_dapm_disable_pin(dapm, "Headphone Jack"); } @@ -80,10 +82,10 @@ static int poodle_startup(struct snd_pcm_substream *substream) static void poodle_shutdown(struct snd_pcm_substream *substream) { /* set = unmute headphone */ - locomo_gpio_write(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_MUTE_L, 1); - locomo_gpio_write(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_MUTE_R, 1); + locomo_gpio_write(poodle_pdata->locomo_dev, + poodle_pdata->gpio_mute_l, 1); + locomo_gpio_write(poodle_pdata->locomo_dev, + poodle_pdata->gpio_mute_r, 1); } static int poodle_hw_params(struct snd_pcm_substream *substream, @@ -174,11 +176,11 @@ static int poodle_amp_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event) { if (SND_SOC_DAPM_EVENT_ON(event)) - locomo_gpio_write(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_AMP_ON, 0); + locomo_gpio_write(poodle_pdata->locomo_dev, + poodle_pdata->gpio_amp_on, 0); else - locomo_gpio_write(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_AMP_ON, 1); + locomo_gpio_write(poodle_pdata->locomo_dev, + poodle_pdata->gpio_amp_on, 1); return 0; } @@ -254,13 +256,14 @@ static int poodle_probe(struct platform_device *pdev) struct snd_soc_card *card = &poodle; int ret; - locomo_gpio_set_dir(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_AMP_ON, 0); + poodle_pdata = pdev->dev.platform_data; + locomo_gpio_set_dir(poodle_pdata->locomo_dev, + poodle_pdata->gpio_amp_on, 0); /* should we mute HP at startup - burning power ?*/ - locomo_gpio_set_dir(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_MUTE_L, 0); - locomo_gpio_set_dir(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_MUTE_R, 0); + locomo_gpio_set_dir(poodle_pdata->locomo_dev, + poodle_pdata->gpio_mute_l, 0); + locomo_gpio_set_dir(poodle_pdata->locomo_dev, + poodle_pdata->gpio_mute_r, 0); card->dev = &pdev->dev; diff --git a/sound/soc/pxa/pxa2xx-ac97.c b/sound/soc/pxa/pxa2xx-ac97.c index 58f8541ba55c..809ea34736ed 100644 --- a/sound/soc/pxa/pxa2xx-ac97.c +++ b/sound/soc/pxa/pxa2xx-ac97.c @@ -21,9 +21,11 @@ #include <sound/pxa2xx-lib.h> #include <sound/dmaengine_pcm.h> -#include <mach/hardware.h> -#include <mach/regs-ac97.h> -#include <mach/audio.h> +#include <linux/platform_data/asoc-pxa.h> + +#define PCDR 0x0040 /* PCM FIFO Data Register */ +#define MODR 0x0140 /* Modem FIFO Data Register */ +#define MCDR 0x0060 /* Mic-in FIFO Data Register */ static void pxa2xx_ac97_warm_reset(struct ac97_controller *adrv) { @@ -59,35 +61,30 @@ static struct ac97_controller_ops pxa2xx_ac97_ops = { }; static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_stereo_in = { - .addr = __PREG(PCDR), .addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES, .chan_name = "pcm_pcm_stereo_in", .maxburst = 32, }; static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_stereo_out = { - .addr = __PREG(PCDR), .addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES, .chan_name = "pcm_pcm_stereo_out", .maxburst = 32, }; static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_aux_mono_out = { - .addr = __PREG(MODR), .addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES, .chan_name = "pcm_aux_mono_out", .maxburst = 16, }; static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_aux_mono_in = { - .addr = __PREG(MODR), .addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES, .chan_name = "pcm_aux_mono_in", .maxburst = 16, }; static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_mic_mono_in = { - .addr = __PREG(MCDR), .addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES, .chan_name = "pcm_aux_mic_mono", .maxburst = 16, @@ -226,6 +223,7 @@ static int pxa2xx_ac97_dev_probe(struct platform_device *pdev) int ret; struct ac97_controller *ctrl; pxa2xx_audio_ops_t *pdata = pdev->dev.platform_data; + struct resource *regs; void **codecs_pdata; if (pdev->id != -1) { @@ -233,6 +231,16 @@ static int pxa2xx_ac97_dev_probe(struct platform_device *pdev) return -ENXIO; } + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!regs) + return -ENXIO; + + pxa2xx_ac97_pcm_stereo_in.addr = regs->start + PCDR; + pxa2xx_ac97_pcm_stereo_out.addr = regs->start + PCDR; + pxa2xx_ac97_pcm_aux_mono_out.addr = regs->start + MODR; + pxa2xx_ac97_pcm_aux_mono_in.addr = regs->start + MODR; + pxa2xx_ac97_pcm_mic_mono_in.addr = regs->start + MCDR; + ret = pxa2xx_ac97_hw_probe(pdev); if (ret) { dev_err(&pdev->dev, "PXA2xx AC97 hw probe error (%d)\n", ret); diff --git a/sound/soc/pxa/pxa2xx-i2s.c b/sound/soc/pxa/pxa2xx-i2s.c index 5bfc1a966532..746e6ec9198b 100644 --- a/sound/soc/pxa/pxa2xx-i2s.c +++ b/sound/soc/pxa/pxa2xx-i2s.c @@ -21,21 +21,20 @@ #include <sound/pxa2xx-lib.h> #include <sound/dmaengine_pcm.h> -#include <mach/hardware.h> -#include <mach/audio.h> +#include <linux/platform_data/asoc-pxa.h> #include "pxa2xx-i2s.h" /* * I2S Controller Register and Bit Definitions */ -#define SACR0 __REG(0x40400000) /* Global Control Register */ -#define SACR1 __REG(0x40400004) /* Serial Audio I 2 S/MSB-Justified Control Register */ -#define SASR0 __REG(0x4040000C) /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */ -#define SAIMR __REG(0x40400014) /* Serial Audio Interrupt Mask Register */ -#define SAICR __REG(0x40400018) /* Serial Audio Interrupt Clear Register */ -#define SADIV __REG(0x40400060) /* Audio Clock Divider Register. */ -#define SADR __REG(0x40400080) /* Serial Audio Data Register (TX and RX FIFO access Register). */ +#define SACR0 (0x0000) /* Global Control Register */ +#define SACR1 (0x0004) /* Serial Audio I 2 S/MSB-Justified Control Register */ +#define SASR0 (0x000C) /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */ +#define SAIMR (0x0014) /* Serial Audio Interrupt Mask Register */ +#define SAICR (0x0018) /* Serial Audio Interrupt Clear Register */ +#define SADIV (0x0060) /* Audio Clock Divider Register. */ +#define SADR (0x0080) /* Serial Audio Data Register (TX and RX FIFO access Register). */ #define SACR0_RFTH(x) ((x) << 12) /* Rx FIFO Interrupt or DMA Trigger Threshold */ #define SACR0_TFTH(x) ((x) << 8) /* Tx FIFO Interrupt or DMA Trigger Threshold */ @@ -77,16 +76,15 @@ struct pxa_i2s_port { static struct pxa_i2s_port pxa_i2s; static struct clk *clk_i2s; static int clk_ena = 0; +static void __iomem *i2s_reg_base; static struct snd_dmaengine_dai_dma_data pxa2xx_i2s_pcm_stereo_out = { - .addr = __PREG(SADR), .addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES, .chan_name = "tx", .maxburst = 32, }; static struct snd_dmaengine_dai_dma_data pxa2xx_i2s_pcm_stereo_in = { - .addr = __PREG(SADR), .addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES, .chan_name = "rx", .maxburst = 32, @@ -102,7 +100,7 @@ static int pxa2xx_i2s_startup(struct snd_pcm_substream *substream, return PTR_ERR(clk_i2s); if (!snd_soc_dai_active(cpu_dai)) - SACR0 = 0; + writel(0, i2s_reg_base + SACR0); return 0; } @@ -114,7 +112,7 @@ static int pxa_i2s_wait(void) /* flush the Rx FIFO */ for (i = 0; i < 16; i++) - SADR; + readl(i2s_reg_base + SADR); return 0; } @@ -174,39 +172,39 @@ static int pxa2xx_i2s_hw_params(struct snd_pcm_substream *substream, /* is port used by another stream */ if (!(SACR0 & SACR0_ENB)) { - SACR0 = 0; + writel(0, i2s_reg_base + SACR0); if (pxa_i2s.master) - SACR0 |= SACR0_BCKD; + writel(readl(i2s_reg_base + SACR0) | (SACR0_BCKD), i2s_reg_base + SACR0); - SACR0 |= SACR0_RFTH(14) | SACR0_TFTH(1); - SACR1 |= pxa_i2s.fmt; + writel(readl(i2s_reg_base + SACR0) | (SACR0_RFTH(14) | SACR0_TFTH(1)), i2s_reg_base + SACR0); + writel(readl(i2s_reg_base + SACR1) | (pxa_i2s.fmt), i2s_reg_base + SACR1); } if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) - SAIMR |= SAIMR_TFS; + writel(readl(i2s_reg_base + SAIMR) | (SAIMR_TFS), i2s_reg_base + SAIMR); else - SAIMR |= SAIMR_RFS; + writel(readl(i2s_reg_base + SAIMR) | (SAIMR_RFS), i2s_reg_base + SAIMR); switch (params_rate(params)) { case 8000: - SADIV = 0x48; + writel(0x48, i2s_reg_base + SADIV); break; case 11025: - SADIV = 0x34; + writel(0x34, i2s_reg_base + SADIV); break; case 16000: - SADIV = 0x24; + writel(0x24, i2s_reg_base + SADIV); break; case 22050: - SADIV = 0x1a; + writel(0x1a, i2s_reg_base + SADIV); break; case 44100: - SADIV = 0xd; + writel(0xd, i2s_reg_base + SADIV); break; case 48000: - SADIV = 0xc; + writel(0xc, i2s_reg_base + SADIV); break; case 96000: /* not in manual and possibly slightly inaccurate */ - SADIV = 0x6; + writel(0x6, i2s_reg_base + SADIV); break; } @@ -221,10 +219,10 @@ static int pxa2xx_i2s_trigger(struct snd_pcm_substream *substream, int cmd, switch (cmd) { case SNDRV_PCM_TRIGGER_START: if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) - SACR1 &= ~SACR1_DRPL; + writel(readl(i2s_reg_base + SACR1) & (~SACR1_DRPL), i2s_reg_base + SACR1); else - SACR1 &= ~SACR1_DREC; - SACR0 |= SACR0_ENB; + writel(readl(i2s_reg_base + SACR1) & (~SACR1_DREC), i2s_reg_base + SACR1); + writel(readl(i2s_reg_base + SACR0) | (SACR0_ENB), i2s_reg_base + SACR0); break; case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: @@ -243,15 +241,15 @@ static void pxa2xx_i2s_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { - SACR1 |= SACR1_DRPL; - SAIMR &= ~SAIMR_TFS; + writel(readl(i2s_reg_base + SACR1) | (SACR1_DRPL), i2s_reg_base + SACR1); + writel(readl(i2s_reg_base + SAIMR) & (~SAIMR_TFS), i2s_reg_base + SAIMR); } else { - SACR1 |= SACR1_DREC; - SAIMR &= ~SAIMR_RFS; + writel(readl(i2s_reg_base + SACR1) | (SACR1_DREC), i2s_reg_base + SACR1); + writel(readl(i2s_reg_base + SAIMR) & (~SAIMR_RFS), i2s_reg_base + SAIMR); } - if ((SACR1 & (SACR1_DREC | SACR1_DRPL)) == (SACR1_DREC | SACR1_DRPL)) { - SACR0 &= ~SACR0_ENB; + if ((readl(i2s_reg_base + SACR1) & (SACR1_DREC | SACR1_DRPL)) == (SACR1_DREC | SACR1_DRPL)) { + writel(readl(i2s_reg_base + SACR0) & (~SACR0_ENB), i2s_reg_base + SACR0); pxa_i2s_wait(); if (clk_ena) { clk_disable_unprepare(clk_i2s); @@ -264,13 +262,13 @@ static void pxa2xx_i2s_shutdown(struct snd_pcm_substream *substream, static int pxa2xx_soc_pcm_suspend(struct snd_soc_component *component) { /* store registers */ - pxa_i2s.sacr0 = SACR0; - pxa_i2s.sacr1 = SACR1; - pxa_i2s.saimr = SAIMR; - pxa_i2s.sadiv = SADIV; + pxa_i2s.sacr0 = readl(i2s_reg_base + SACR0); + pxa_i2s.sacr1 = readl(i2s_reg_base + SACR1); + pxa_i2s.saimr = readl(i2s_reg_base + SAIMR); + pxa_i2s.sadiv = readl(i2s_reg_base + SADIV); /* deactivate link */ - SACR0 &= ~SACR0_ENB; + writel(readl(i2s_reg_base + SACR0) & (~SACR0_ENB), i2s_reg_base + SACR0); pxa_i2s_wait(); return 0; } @@ -279,12 +277,12 @@ static int pxa2xx_soc_pcm_resume(struct snd_soc_component *component) { pxa_i2s_wait(); - SACR0 = pxa_i2s.sacr0 & ~SACR0_ENB; - SACR1 = pxa_i2s.sacr1; - SAIMR = pxa_i2s.saimr; - SADIV = pxa_i2s.sadiv; + writel(pxa_i2s.sacr0 & ~SACR0_ENB, i2s_reg_base + SACR0); + writel(pxa_i2s.sacr1, i2s_reg_base + SACR1); + writel(pxa_i2s.saimr, i2s_reg_base + SAIMR); + writel(pxa_i2s.sadiv, i2s_reg_base + SADIV); - SACR0 = pxa_i2s.sacr0; + writel(pxa_i2s.sacr0, i2s_reg_base + SACR0); return 0; } @@ -306,12 +304,12 @@ static int pxa2xx_i2s_probe(struct snd_soc_dai *dai) * the SACR0[RST] bit must also be set and cleared to reset all * I2S controller registers. */ - SACR0 = SACR0_RST; - SACR0 = 0; + writel(SACR0_RST, i2s_reg_base + SACR0); + writel(0, i2s_reg_base + SACR0); /* Make sure RPL and REC are disabled */ - SACR1 = SACR1_DRPL | SACR1_DREC; + writel(SACR1_DRPL | SACR1_DREC, i2s_reg_base + SACR1); /* Along with FIFO servicing */ - SAIMR &= ~(SAIMR_RFS | SAIMR_TFS); + writel(readl(i2s_reg_base + SAIMR) & (~(SAIMR_RFS | SAIMR_TFS)), i2s_reg_base + SAIMR); snd_soc_dai_init_dma_data(dai, &pxa2xx_i2s_pcm_stereo_out, &pxa2xx_i2s_pcm_stereo_in); @@ -371,6 +369,22 @@ static const struct snd_soc_component_driver pxa_i2s_component = { static int pxa2xx_i2s_drv_probe(struct platform_device *pdev) { + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + + if (!res) { + dev_err(&pdev->dev, "missing MMIO resource\n"); + return -ENXIO; + } + + i2s_reg_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(i2s_reg_base)) { + dev_err(&pdev->dev, "ioremap failed\n"); + return PTR_ERR(i2s_reg_base); + } + + pxa2xx_i2s_pcm_stereo_out.addr = res->start + SADR; + pxa2xx_i2s_pcm_stereo_in.addr = res->start + SADR; + return devm_snd_soc_register_component(&pdev->dev, &pxa_i2s_component, &pxa_i2s_dai, 1); } diff --git a/sound/soc/pxa/spitz.c b/sound/soc/pxa/spitz.c index 7c1384a869ca..44303b6eb228 100644 --- a/sound/soc/pxa/spitz.c +++ b/sound/soc/pxa/spitz.c @@ -14,13 +14,12 @@ #include <linux/timer.h> #include <linux/interrupt.h> #include <linux/platform_device.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <sound/core.h> #include <sound/pcm.h> #include <sound/soc.h> #include <asm/mach-types.h> -#include <mach/spitz.h> #include "../codecs/wm8750.h" #include "pxa2xx-i2s.h" @@ -37,7 +36,7 @@ static int spitz_jack_func; static int spitz_spk_func; -static int spitz_mic_gpio; +static struct gpio_desc *gpiod_mic, *gpiod_mute_l, *gpiod_mute_r; static void spitz_ext_control(struct snd_soc_dapm_context *dapm) { @@ -56,8 +55,8 @@ static void spitz_ext_control(struct snd_soc_dapm_context *dapm) snd_soc_dapm_disable_pin_unlocked(dapm, "Mic Jack"); snd_soc_dapm_disable_pin_unlocked(dapm, "Line Jack"); snd_soc_dapm_enable_pin_unlocked(dapm, "Headphone Jack"); - gpio_set_value(SPITZ_GPIO_MUTE_L, 1); - gpio_set_value(SPITZ_GPIO_MUTE_R, 1); + gpiod_set_value(gpiod_mute_l, 1); + gpiod_set_value(gpiod_mute_r, 1); break; case SPITZ_MIC: /* enable mic jack and bias, mute hp */ @@ -65,8 +64,8 @@ static void spitz_ext_control(struct snd_soc_dapm_context *dapm) snd_soc_dapm_disable_pin_unlocked(dapm, "Headset Jack"); snd_soc_dapm_disable_pin_unlocked(dapm, "Line Jack"); snd_soc_dapm_enable_pin_unlocked(dapm, "Mic Jack"); - gpio_set_value(SPITZ_GPIO_MUTE_L, 0); - gpio_set_value(SPITZ_GPIO_MUTE_R, 0); + gpiod_set_value(gpiod_mute_l, 0); + gpiod_set_value(gpiod_mute_r, 0); break; case SPITZ_LINE: /* enable line jack, disable mic bias and mute hp */ @@ -74,8 +73,8 @@ static void spitz_ext_control(struct snd_soc_dapm_context *dapm) snd_soc_dapm_disable_pin_unlocked(dapm, "Headset Jack"); snd_soc_dapm_disable_pin_unlocked(dapm, "Mic Jack"); snd_soc_dapm_enable_pin_unlocked(dapm, "Line Jack"); - gpio_set_value(SPITZ_GPIO_MUTE_L, 0); - gpio_set_value(SPITZ_GPIO_MUTE_R, 0); + gpiod_set_value(gpiod_mute_l, 0); + gpiod_set_value(gpiod_mute_r, 0); break; case SPITZ_HEADSET: /* enable and unmute headset jack enable mic bias, mute L hp */ @@ -83,8 +82,8 @@ static void spitz_ext_control(struct snd_soc_dapm_context *dapm) snd_soc_dapm_enable_pin_unlocked(dapm, "Mic Jack"); snd_soc_dapm_disable_pin_unlocked(dapm, "Line Jack"); snd_soc_dapm_enable_pin_unlocked(dapm, "Headset Jack"); - gpio_set_value(SPITZ_GPIO_MUTE_L, 0); - gpio_set_value(SPITZ_GPIO_MUTE_R, 1); + gpiod_set_value(gpiod_mute_l, 0); + gpiod_set_value(gpiod_mute_r, 1); break; case SPITZ_HP_OFF: @@ -93,8 +92,8 @@ static void spitz_ext_control(struct snd_soc_dapm_context *dapm) snd_soc_dapm_disable_pin_unlocked(dapm, "Headset Jack"); snd_soc_dapm_disable_pin_unlocked(dapm, "Mic Jack"); snd_soc_dapm_disable_pin_unlocked(dapm, "Line Jack"); - gpio_set_value(SPITZ_GPIO_MUTE_L, 0); - gpio_set_value(SPITZ_GPIO_MUTE_R, 0); + gpiod_set_value(gpiod_mute_l, 0); + gpiod_set_value(gpiod_mute_r, 0); break; } @@ -199,7 +198,7 @@ static int spitz_set_spk(struct snd_kcontrol *kcontrol, static int spitz_mic_bias(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event) { - gpio_set_value_cansleep(spitz_mic_gpio, SND_SOC_DAPM_EVENT_ON(event)); + gpiod_set_value_cansleep(gpiod_mic, SND_SOC_DAPM_EVENT_ON(event)); return 0; } @@ -287,39 +286,28 @@ static int spitz_probe(struct platform_device *pdev) struct snd_soc_card *card = &snd_soc_spitz; int ret; - if (machine_is_akita()) - spitz_mic_gpio = AKITA_GPIO_MIC_BIAS; - else - spitz_mic_gpio = SPITZ_GPIO_MIC_BIAS; - - ret = gpio_request(spitz_mic_gpio, "MIC GPIO"); - if (ret) - goto err1; - - ret = gpio_direction_output(spitz_mic_gpio, 0); - if (ret) - goto err2; + gpiod_mic = devm_gpiod_get(&pdev->dev, "mic", GPIOD_OUT_LOW); + if (IS_ERR(gpiod_mic)) + return PTR_ERR(gpiod_mic); + gpiod_mute_l = devm_gpiod_get(&pdev->dev, "mute-l", GPIOD_OUT_LOW); + if (IS_ERR(gpiod_mute_l)) + return PTR_ERR(gpiod_mute_l); + gpiod_mute_r = devm_gpiod_get(&pdev->dev, "mute-r", GPIOD_OUT_LOW); + if (IS_ERR(gpiod_mute_r)) + return PTR_ERR(gpiod_mute_r); card->dev = &pdev->dev; ret = devm_snd_soc_register_card(&pdev->dev, card); - if (ret) { + if (ret) dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret); - goto err2; - } - - return 0; -err2: - gpio_free(spitz_mic_gpio); -err1: return ret; } static int spitz_remove(struct platform_device *pdev) { - gpio_free(spitz_mic_gpio); return 0; } diff --git a/sound/soc/pxa/tosa.c b/sound/soc/pxa/tosa.c index 3b40b5fa5de7..30f83cab0c32 100644 --- a/sound/soc/pxa/tosa.c +++ b/sound/soc/pxa/tosa.c @@ -16,15 +16,14 @@ #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/device.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <sound/core.h> #include <sound/pcm.h> #include <sound/soc.h> #include <asm/mach-types.h> -#include <mach/tosa.h> -#include <mach/audio.h> +#include <linux/platform_data/asoc-pxa.h> #define TOSA_HP 0 #define TOSA_MIC_INT 1 @@ -33,6 +32,7 @@ #define TOSA_SPK_ON 0 #define TOSA_SPK_OFF 1 +static struct gpio_desc *tosa_mute; static int tosa_jack_func; static int tosa_spk_func; @@ -128,7 +128,7 @@ static int tosa_set_spk(struct snd_kcontrol *kcontrol, static int tosa_hp_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event) { - gpio_set_value(TOSA_GPIO_L_MUTE, SND_SOC_DAPM_EVENT_ON(event) ? 1 : 0); + gpiod_set_value(tosa_mute, SND_SOC_DAPM_EVENT_ON(event) ? 1 : 0); return 0; } @@ -222,10 +222,11 @@ static int tosa_probe(struct platform_device *pdev) struct snd_soc_card *card = ⤩ int ret; - ret = gpio_request_one(TOSA_GPIO_L_MUTE, GPIOF_OUT_INIT_LOW, - "Headphone Jack"); - if (ret) - return ret; + tosa_mute = devm_gpiod_get(&pdev->dev, NULL, GPIOD_OUT_LOW); + if (IS_ERR(tosa_mute)) + return dev_err_probe(&pdev->dev, PTR_ERR(tosa_mute), + "failed to get L_MUTE GPIO\n"); + gpiod_set_consumer_name(tosa_mute, "Headphone Jack"); card->dev = &pdev->dev; @@ -233,24 +234,16 @@ static int tosa_probe(struct platform_device *pdev) if (ret) { dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret); - gpio_free(TOSA_GPIO_L_MUTE); } return ret; } -static int tosa_remove(struct platform_device *pdev) -{ - gpio_free(TOSA_GPIO_L_MUTE); - return 0; -} - static struct platform_driver tosa_driver = { .driver = { .name = "tosa-audio", .pm = &snd_soc_pm_ops, }, .probe = tosa_probe, - .remove = tosa_remove, }; module_platform_driver(tosa_driver); diff --git a/sound/soc/pxa/z2.c b/sound/soc/pxa/z2.c index f4a7cfe22115..020dcce1df1f 100644 --- a/sound/soc/pxa/z2.c +++ b/sound/soc/pxa/z2.c @@ -13,7 +13,7 @@ #include <linux/timer.h> #include <linux/interrupt.h> #include <linux/platform_device.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <sound/core.h> #include <sound/pcm.h> @@ -21,9 +21,7 @@ #include <sound/jack.h> #include <asm/mach-types.h> -#include <mach/hardware.h> -#include <mach/audio.h> -#include <mach/z2.h> +#include <linux/platform_data/asoc-pxa.h> #include "../codecs/wm8750.h" #include "pxa2xx-i2s.h" @@ -90,7 +88,6 @@ static struct snd_soc_jack_pin hs_jack_pins[] = { /* Headset jack detection gpios */ static struct snd_soc_jack_gpio hs_jack_gpios[] = { { - .gpio = GPIO37_ZIPITZ2_HEADSET_DETECT, .name = "hsdet-gpio", .report = SND_JACK_HEADSET, .debounce_time = 200, @@ -197,6 +194,7 @@ static int __init z2_init(void) if (!z2_snd_device) return -ENOMEM; + hs_jack_gpios[0].gpiod_dev = &z2_snd_device->dev; platform_set_drvdata(z2_snd_device, &snd_soc_z2); ret = platform_device_add(z2_snd_device); |