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author | Ingo Molnar <mingo@kernel.org> | 2018-06-03 20:11:38 +0300 |
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committer | Ingo Molnar <mingo@kernel.org> | 2018-06-03 20:11:38 +0300 |
commit | 4e9ae0d3d5bf4e2f1b466ba451bd18f2c5b69845 (patch) | |
tree | 51a6a1b796039c00d71c30577dac42ec80936f52 /tools/perf/util/intel-pt-decoder/insn.h | |
parent | 874cd339acdfe734b5418e36e3ad40fd4c573155 (diff) | |
parent | 0b3a18387f3e5cdcfaaf884860a4688280d09c9d (diff) | |
download | linux-4e9ae0d3d5bf4e2f1b466ba451bd18f2c5b69845.tar.xz |
Merge tag 'perf-urgent-for-mingo-4.17-20180602' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/urgent
Pull perf/urgent fixes from Carvalho de Melo:
- Update prctl and cpufeatures.h tools/ copies with the kernel sources
originals, which makes 'perf trace' know about the new prctl options
for speculation control and silences the build warnings (Arnaldo Carvalho de Melo)
- Update insn.h in Intel-PT instruction decoder with its original from from the
kernel sources, to silence build warnings, no effect on the actual tools this
time around (Arnaldo Carvalho de Melo)
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'tools/perf/util/intel-pt-decoder/insn.h')
-rw-r--r-- | tools/perf/util/intel-pt-decoder/insn.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/tools/perf/util/intel-pt-decoder/insn.h b/tools/perf/util/intel-pt-decoder/insn.h index e23578c7b1be..2669c9f748e4 100644 --- a/tools/perf/util/intel-pt-decoder/insn.h +++ b/tools/perf/util/intel-pt-decoder/insn.h @@ -208,4 +208,22 @@ static inline int insn_offset_immediate(struct insn *insn) return insn_offset_displacement(insn) + insn->displacement.nbytes; } +#define POP_SS_OPCODE 0x1f +#define MOV_SREG_OPCODE 0x8e + +/* + * Intel SDM Vol.3A 6.8.3 states; + * "Any single-step trap that would be delivered following the MOV to SS + * instruction or POP to SS instruction (because EFLAGS.TF is 1) is + * suppressed." + * This function returns true if @insn is MOV SS or POP SS. On these + * instructions, single stepping is suppressed. + */ +static inline int insn_masking_exception(struct insn *insn) +{ + return insn->opcode.bytes[0] == POP_SS_OPCODE || + (insn->opcode.bytes[0] == MOV_SREG_OPCODE && + X86_MODRM_REG(insn->modrm.bytes[0]) == 2); +} + #endif /* _ASM_X86_INSN_H */ |