summaryrefslogtreecommitdiff
path: root/tools/power/cpupower/utils/helpers/misc.c
diff options
context:
space:
mode:
authorSherry Hurwitz <sherry.hurwitz@amd.com>2017-06-20 10:08:42 +0300
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2017-06-27 02:43:22 +0300
commit902bef73faa99b8c024e0f18c6199872b7cccb52 (patch)
treef235b3a54098e33402dbee96d95ef4bb01758f9b /tools/power/cpupower/utils/helpers/misc.c
parent6ae78b4e7c276e5306897269443f66cb4d86e47f (diff)
downloadlinux-902bef73faa99b8c024e0f18c6199872b7cccb52.tar.xz
cpupower: Add support for new AMD family 0x17
Add support for new AMD family 0x17 - Add bit field changes to the msr_pstate structure - Add the new formula for the calculation of cof - Changed method to access to CpbDis Signed-off-by: Sherry Hurwitz <sherry.hurwitz@amd.com> Acked-by: Thomas Renninger <trenn@suse.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'tools/power/cpupower/utils/helpers/misc.c')
-rw-r--r--tools/power/cpupower/utils/helpers/misc.c22
1 files changed, 19 insertions, 3 deletions
diff --git a/tools/power/cpupower/utils/helpers/misc.c b/tools/power/cpupower/utils/helpers/misc.c
index 6952a6abd1e5..601d719d4e60 100644
--- a/tools/power/cpupower/utils/helpers/misc.c
+++ b/tools/power/cpupower/utils/helpers/misc.c
@@ -2,11 +2,14 @@
#include "helpers/helpers.h"
+#define MSR_AMD_HWCR 0xc0010015
+
int cpufreq_has_boost_support(unsigned int cpu, int *support, int *active,
int *states)
{
struct cpupower_cpu_info cpu_info;
int ret;
+ unsigned long long val;
*support = *active = *states = 0;
@@ -16,9 +19,22 @@ int cpufreq_has_boost_support(unsigned int cpu, int *support, int *active,
if (cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_CBP) {
*support = 1;
- ret = amd_pci_get_num_boost_states(active, states);
- if (ret)
- return ret;
+
+ /* AMD Family 0x17 does not utilize PCI D18F4 like prior
+ * families and has no fixed discrete boost states but
+ * has Hardware determined variable increments instead.
+ */
+
+ if (cpu_info.family == 0x17) {
+ if (!read_msr(cpu, MSR_AMD_HWCR, &val)) {
+ if (!(val & CPUPOWER_AMD_CPBDIS))
+ *active = 1;
+ }
+ } else {
+ ret = amd_pci_get_num_boost_states(active, states);
+ if (ret)
+ return ret;
+ }
} else if (cpupower_cpu_info.caps & CPUPOWER_CAP_INTEL_IDA)
*support = *active = 1;
return 0;