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-rw-r--r--arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c b/arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c
index fea71a85bb29..a92632223497 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c
@@ -156,8 +156,9 @@ int __cvmx_helper_xaui_enable(int interface)
xauiCtl.u64 = cvmx_read_csr(CVMX_PCSXX_CONTROL1_REG(interface));
xauiCtl.s.lo_pwr = 0;
- /* Issuing a reset here seems to hang some CN68XX chips. */
- if (!OCTEON_IS_MODEL(OCTEON_CN68XX_PASS1_X) &&
+ /* Issuing a reset here seems to hang some CN66XX/CN68XX chips. */
+ if (!OCTEON_IS_MODEL(OCTEON_CN66XX) &&
+ !OCTEON_IS_MODEL(OCTEON_CN68XX_PASS1_X) &&
!OCTEON_IS_MODEL(OCTEON_CN68XX_PASS2_X))
xauiCtl.s.reset = 1;