diff options
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts | 14 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts | 23 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/mba8mx.dtsi | 19 |
3 files changed, 29 insertions, 27 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts index ea6e8b85169f..01b632b220dc 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts @@ -5,6 +5,8 @@ /dts-v1/; +#include <dt-bindings/phy/phy-imx8-pcie.h> + #include "imx8mm-tqma8mqml.dtsi" #include "mba8mx.dtsi" @@ -74,19 +76,23 @@ }; &pcie_phy { - clocks = <&pcie0_refclk>; + fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; + fsl,clkreq-unsupported; + clocks = <&pcieclk 2>; + clock-names = "ref"; status = "okay"; }; +/* PCIe slot on X36 */ &pcie0 { reset-gpio = <&expander0 14 GPIO_ACTIVE_LOW>; - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcieclk 3>, <&clk IMX8MM_CLK_PCIE1_AUX>; assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, - <&clk IMX8MM_CLK_PCIE1_CTRL>; + <&clk IMX8MM_CLK_PCIE1_CTRL>; assigned-clock-rates = <10000000>, <250000000>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>, - <&clk IMX8MM_SYS_PLL2_250M>; + <&clk IMX8MM_SYS_PLL2_250M>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts b/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts index b302daca4ce6..b2e17d4f335e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts @@ -28,18 +28,6 @@ id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; }; - pcie0_refclk: pcie0-refclk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - }; - - pcie1_refclk: pcie1-refclk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - }; - reg_otg_vbus: regulator-otg-vbus { compatible = "regulator-fixed"; pinctrl-names = "default"; @@ -103,23 +91,24 @@ gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; }; +/* PCIe slot on X36 */ &pcie0 { reset-gpio = <&expander0 14 GPIO_ACTIVE_LOW>; clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>, - <&pcie0_refclk>, - <&clk IMX8MQ_CLK_PCIE1_PHY>, + <&pcieclk 3>, + <&pcieclk 2>, <&clk IMX8MQ_CLK_PCIE1_AUX>; status = "okay"; }; /* - * miniPCIe, also usable for cards with USB. Therefore configure the reset as + * miniPCIe on X28, also usable for cards with USB. Therefore configure the reset as * static gpio hog. */ &pcie1 { clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>, - <&pcie1_refclk>, - <&clk IMX8MQ_CLK_PCIE2_PHY>, + <&pcieclk 1>, + <&pcieclk 0>, <&clk IMX8MQ_CLK_PCIE2_AUX>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/mba8mx.dtsi b/arch/arm64/boot/dts/freescale/mba8mx.dtsi index e2bc53b8d39a..c82af672d183 100644 --- a/arch/arm64/boot/dts/freescale/mba8mx.dtsi +++ b/arch/arm64/boot/dts/freescale/mba8mx.dtsi @@ -29,6 +29,12 @@ stdout-path = &uart3; }; + clk_xtal25: clk-xtal25 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; @@ -100,12 +106,6 @@ }; }; - pcie0_refclk: pcie0-refclk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - }; - reg_12v: regulator-12v { compatible = "regulator-fixed"; regulator-name = "MBA8MX_12V"; @@ -264,6 +264,13 @@ pagesize = <16>; vcc-supply = <®_vcc_3v3>; }; + + pcieclk: clk@68 { + compatible = "renesas,9fgv0441"; + reg = <0x68>; + clocks = <&clk_xtal25>; + #clock-cells = <1>; + }; }; &i2c3 { |