summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--arch/arm/boot/dts/qcom-apq8026-huawei-sturgeon.dts28
-rw-r--r--arch/arm/boot/dts/qcom-apq8060-dragonboard.dts84
-rw-r--r--arch/arm/boot/dts/qcom-apq8074-dragonboard.dts83
-rw-r--r--arch/arm/boot/dts/qcom-apq8084.dtsi2
-rw-r--r--arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts8
-rw-r--r--arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi10
-rw-r--r--arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi12
-rw-r--r--arch/arm/boot/dts/qcom-ipq8064-rb3011.dts2
-rw-r--r--arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi10
-rw-r--r--arch/arm/boot/dts/qcom-ipq8064.dtsi12
-rw-r--r--arch/arm/boot/dts/qcom-msm8226.dtsi25
-rw-r--r--arch/arm/boot/dts/qcom-msm8960-cdp.dts16
-rw-r--r--arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts35
-rw-r--r--arch/arm/boot/dts/qcom-msm8974.dtsi10
-rw-r--r--arch/arm/boot/dts/qcom-sdx55.dtsi4
-rw-r--r--arch/arm/boot/dts/qcom-sdx65-mtp.dts42
-rw-r--r--arch/arm/boot/dts/qcom-sdx65.dtsi87
17 files changed, 381 insertions, 89 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8026-huawei-sturgeon.dts b/arch/arm/boot/dts/qcom-apq8026-huawei-sturgeon.dts
index d64096028ab1..eb73b992a696 100644
--- a/arch/arm/boot/dts/qcom-apq8026-huawei-sturgeon.dts
+++ b/arch/arm/boot/dts/qcom-apq8026-huawei-sturgeon.dts
@@ -7,6 +7,7 @@
#include "qcom-msm8226.dtsi"
#include "qcom-pm8226.dtsi"
+#include <dt-bindings/input/ti-drv260x.h>
/delete-node/ &adsp_region;
@@ -68,6 +69,26 @@
status = "okay";
};
+&blsp1_i2c2 {
+ clock-frequency = <384000>;
+
+ status = "okay";
+
+ vibrator@5a {
+ compatible = "ti,drv2605";
+ reg = <0x5a>;
+ enable-gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
+
+ mode = <DRV260X_ERM_MODE>;
+ library-sel = <DRV260X_ERM_LIB_D>;
+ vib-rated-mv = <2765>;
+ vib-overdrive-mv = <3525>;
+
+ pinctrl-0 = <&vibrator_default_state>;
+ pinctrl-names = "default";
+ };
+};
+
&blsp1_i2c5 {
clock-frequency = <384000>;
@@ -347,6 +368,13 @@
};
};
+ vibrator_default_state: vibrator-default-state {
+ pins = "gpio59", "gpio60";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
wlan_hostwake_default_state: wlan-hostwake-default-state {
pins = "gpio66";
function = "gpio";
diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
index 8e4b61e4d4b1..db4c791b2e2f 100644
--- a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
+++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
@@ -18,50 +18,46 @@
stdout-path = "serial0:115200n8";
};
- regulators {
- compatible = "simple-bus";
-
- /* Main power of the board: 3.7V */
- vph: regulator-fixed {
- compatible = "regulator-fixed";
- regulator-min-microvolt = <3700000>;
- regulator-max-microvolt = <3700000>;
- regulator-name = "VPH";
- regulator-type = "voltage";
- regulator-always-on;
- regulator-boot-on;
- };
-
- /* GPIO controlled ethernet power regulator */
- dragon_veth: xc622a331mrg {
- compatible = "regulator-fixed";
- regulator-name = "XC6222A331MR-G";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vph>;
- gpio = <&pm8058_gpio 40 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- pinctrl-names = "default";
- pinctrl-0 = <&dragon_veth_gpios>;
- regulator-always-on;
- };
+ /* Main power of the board: 3.7V */
+ vph: regulator-fixed {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <3700000>;
+ regulator-max-microvolt = <3700000>;
+ regulator-name = "VPH";
+ regulator-type = "voltage";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ /* GPIO controlled ethernet power regulator */
+ dragon_veth: xc622a331mrg {
+ compatible = "regulator-fixed";
+ regulator-name = "XC6222A331MR-G";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vph>;
+ gpio = <&pm8058_gpio 40 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&dragon_veth_gpios>;
+ regulator-always-on;
+ };
- /* VDDvario fixed regulator */
- dragon_vario: nds332p {
- compatible = "regulator-fixed";
- regulator-name = "NDS332P";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&pm8058_s3>;
- };
+ /* VDDvario fixed regulator */
+ dragon_vario: nds332p {
+ compatible = "regulator-fixed";
+ regulator-name = "NDS332P";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&pm8058_s3>;
+ };
- /* This is a levelshifter for SDCC5 */
- dragon_vio_txb: txb0104rgyr {
- compatible = "regulator-fixed";
- regulator-name = "Dragon SDCC levelshifter";
- vin-supply = <&pm8058_l14>;
- regulator-always-on;
- };
+ /* This is a levelshifter for SDCC5 */
+ dragon_vio_txb: txb0104rgyr {
+ compatible = "regulator-fixed";
+ regulator-name = "Dragon SDCC levelshifter";
+ vin-supply = <&pm8058_l14>;
+ regulator-always-on;
};
/*
@@ -451,7 +447,7 @@
* PM8901 supplies "preliminary regulators" whatever
* that means
*/
- pm8901-regulators {
+ regulators-0 {
vdd_l0-supply = <&pm8901_s4>;
vdd_l1-supply = <&vph>;
vdd_l2-supply = <&vph>;
@@ -537,7 +533,7 @@
};
- pm8058-regulators {
+ regulators-1 {
vdd_l0_l1_lvs-supply = <&pm8058_s3>;
vdd_l2_l11_l12-supply = <&vph>;
vdd_l3_l4_l5-supply = <&vph>;
diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
index 1345df7cbd00..72f7e09a5bbf 100644
--- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
+++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
@@ -4,6 +4,8 @@
#include "qcom-pm8841.dtsi"
#include "qcom-pm8941.dtsi"
+/delete-node/ &mpss_region;
+
/ {
model = "Qualcomm APQ8074 Dragonboard";
compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
@@ -17,12 +19,23 @@
chosen {
stdout-path = "serial0:115200n8";
};
+
+ reserved-memory {
+ mpss_region: mpss@ac00000 {
+ reg = <0x0ac00000 0x2500000>;
+ no-map;
+ };
+ };
};
&blsp1_uart2 {
status = "okay";
};
+&blsp2_dma {
+ qcom,controlled-remotely;
+};
+
&blsp2_i2c5 {
status = "okay";
clock-frequency = <200000>;
@@ -35,6 +48,76 @@
};
};
+&dsi0 {
+ vdda-supply = <&pm8941_l2>;
+ vdd-supply = <&pm8941_l22>;
+ vddio-supply = <&pm8941_l12>;
+
+ status = "okay";
+
+ panel: panel@0 {
+ compatible = "sharp,ls043t1le01-qhd";
+ reg = <0>;
+
+ avdd-supply = <&pm8941_l22>;
+ backlight = <&pm8941_wled>;
+ reset-gpios = <&pm8941_gpios 19 GPIO_ACTIVE_HIGH>;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&dsi0_out>;
+ };
+ };
+ };
+};
+
+&dsi0_out {
+ remote-endpoint = <&panel_in>;
+ data-lanes = <0 1 2 3>;
+};
+
+&dsi0_phy {
+ status = "okay";
+
+ vddio-supply = <&pm8941_l12>;
+};
+
+&gpu {
+ status = "okay";
+};
+
+&mdss {
+ status = "okay";
+};
+
+&pm8941_wled {
+ qcom,cs-out;
+ qcom,switching-freq = <3200>;
+ qcom,ovp = <32>;
+ qcom,num-strings = <1>;
+
+ status = "okay";
+};
+
+&remoteproc_adsp {
+ cx-supply = <&pm8841_s2>;
+
+ firmware-name = "qcom/apq8074/adsp.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_mss {
+ cx-supply = <&pm8841_s2>;
+ mss-supply = <&pm8841_s3>;
+ mx-supply = <&pm8841_s1>;
+ pll-supply = <&pm8941_l12>;
+
+ firmware-name = "qcom/apq8074/mba.mbn", "qcom/apq8074/modem.mbn";
+
+ status = "okay";
+};
+
&rpm_requests {
regulators-0 {
compatible = "qcom,rpm-pm8841-regulators";
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index b653ea40c441..207124d68128 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -506,7 +506,7 @@
};
};
- tsens: thermal-sensor@fc4a8000 {
+ tsens: thermal-sensor@fc4a9000 {
compatible = "qcom,msm8974-tsens", "qcom,tsens-v0_1";
reg = <0xfc4a9000 0x1000>, /* TM */
<0xfc4a8000 0x1000>; /* SROT */
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
index 79b0c6318e52..0993f840d1fc 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
@@ -11,9 +11,9 @@
dma-controller@7984000 {
status = "okay";
};
-
- qpic-nand@79b0000 {
- status = "okay";
- };
};
};
+
+&nand {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
index a63b3778636d..468ebc40d2ad 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
@@ -102,10 +102,10 @@
status = "okay";
perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
};
-
- qpic-nand@79b0000 {
- pinctrl-0 = <&nand_pins>;
- pinctrl-names = "default";
- };
};
};
+
+&nand {
+ pinctrl-0 = <&nand_pins>;
+ pinctrl-names = "default";
+};
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi
index 0107f552f520..7ef635997efa 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi
@@ -65,11 +65,11 @@
dma-controller@7984000 {
status = "okay";
};
-
- qpic-nand@79b0000 {
- pinctrl-0 = <&nand_pins>;
- pinctrl-names = "default";
- status = "okay";
- };
};
};
+
+&nand {
+ pinctrl-0 = <&nand_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
index 4d509876294b..104eb729c2d6 100644
--- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
@@ -323,7 +323,7 @@
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
- led@7 {
+ led-0 {
label = "rb3011:green:user";
color = <LED_COLOR_ID_GREEN>;
gpios = <&qcom_pinmux 33 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi b/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
index 411c8d63c38e..c5abe7151f14 100644
--- a/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
@@ -92,34 +92,34 @@
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
- led@7 {
+ led-0 {
label = "led_usb1";
gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "usbdev";
default-state = "off";
};
- led@8 {
+ led-1 {
label = "led_usb3";
gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "usbdev";
default-state = "off";
};
- led@9 {
+ led-2 {
label = "status_led_fail";
function = LED_FUNCTION_STATUS;
gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
- led@26 {
+ led-3 {
label = "sata_led";
gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
- led@53 {
+ led-4 {
label = "status_led_pass";
function = LED_FUNCTION_STATUS;
gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index af6764770fd1..5ef5026fb7bc 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -520,7 +520,7 @@
#reset-cells = <1>;
#power-domain-cells = <1>;
- tsens: thermal-sensor@900000 {
+ tsens: thermal-sensor {
compatible = "qcom,ipq8064-tsens";
nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
@@ -606,12 +606,12 @@
regulator;
};
- nss_common: syscon@03000000 {
+ nss_common: syscon@3000000 {
compatible = "syscon";
reg = <0x03000000 0x0000FFFF>;
};
- usb3_0: usb3@100f8800 {
+ usb3_0: usb@100f8800 {
compatible = "qcom,ipq8064-dwc3", "qcom,dwc3";
#address-cells = <1>;
#size-cells = <1>;
@@ -626,7 +626,7 @@
status = "disabled";
- dwc3_0: dwc3@10000000 {
+ dwc3_0: usb@10000000 {
compatible = "snps,dwc3";
reg = <0x10000000 0xcd00>;
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
@@ -657,7 +657,7 @@
status = "disabled";
};
- usb3_1: usb3@110f8800 {
+ usb3_1: usb@110f8800 {
compatible = "qcom,ipq8064-dwc3", "qcom,dwc3";
#address-cells = <1>;
#size-cells = <1>;
@@ -672,7 +672,7 @@
status = "disabled";
- dwc3_1: dwc3@11000000 {
+ dwc3_1: usb@11000000 {
compatible = "snps,dwc3";
reg = <0x11000000 0xcd00>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi
index 42acb9ddb8cc..a3a9162e9c28 100644
--- a/arch/arm/boot/dts/qcom-msm8226.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8226.dtsi
@@ -47,6 +47,12 @@
};
};
+ pmu {
+ compatible = "arm,cortex-a7-pmu";
+ interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
@@ -592,6 +598,11 @@
};
};
+ sram@fc190000 {
+ compatible = "qcom,msm8226-rpm-stats";
+ reg = <0xfc190000 0x10000>;
+ };
+
rpm_msg_ram: sram@fc428000 {
compatible = "qcom,rpm-msg-ram";
reg = <0xfc428000 0x4000>;
@@ -636,6 +647,20 @@
label = "lpass";
};
};
+
+ sram@fe805000 {
+ compatible = "qcom,msm8226-imem", "syscon", "simple-mfd";
+ reg = <0xfe805000 0x1000>;
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x65c>;
+
+ mode-bootloader = <0x77665500>;
+ mode-normal = <0x77665501>;
+ mode-recovery = <0x77665502>;
+ };
+ };
};
timer {
diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts
index 8fa2befa629a..6c1bc3818883 100644
--- a/arch/arm/boot/dts/qcom-msm8960-cdp.dts
+++ b/arch/arm/boot/dts/qcom-msm8960-cdp.dts
@@ -15,16 +15,12 @@
stdout-path = "serial0:115200n8";
};
- regulators {
- compatible = "simple-bus";
-
- ext_l2: gpio-regulator {
- compatible = "regulator-fixed";
- regulator-name = "ext_l2";
- gpio = <&msmgpio 91 0>;
- startup-delay-us = <10000>;
- enable-active-high;
- };
+ ext_l2: gpio-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "ext_l2";
+ gpio = <&msmgpio 91 0>;
+ startup-delay-us = <10000>;
+ enable-active-high;
};
};
diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
index ab35f2d644c0..fea8a6be9021 100644
--- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
@@ -41,6 +41,25 @@
};
};
+ clk_pwm: pwm {
+ compatible = "clk-pwm";
+ clocks = <&mmcc CAMSS_GP1_CLK>;
+
+ pinctrl-0 = <&vibrator_pin>;
+ pinctrl-names = "default";
+
+ #pwm-cells = <2>;
+ };
+
+ vibrator {
+ compatible = "pwm-vibrator";
+ pwms = <&clk_pwm 0 100000>;
+ pwm-names = "enable";
+
+ vcc-supply = <&pm8941_l19>;
+ enable-gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
+ };
+
vreg_wlan: wlan-regulator {
compatible = "regulator-fixed";
@@ -637,6 +656,22 @@
function = "gpio";
};
};
+
+ vibrator_pin: vibrator-state {
+ core-pins {
+ pins = "gpio27";
+ function = "gp1_clk";
+ drive-strength = <6>;
+ bias-disable;
+ };
+
+ enable-pins {
+ pins = "gpio60";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
};
&usb {
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 8208012684d4..7dcbe0810e34 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -300,7 +300,7 @@
qcom,ipc = <&apcs 8 0>;
qcom,smd-edge = <15>;
- rpm_requests: rpm_requests {
+ rpm_requests: rpm-requests {
compatible = "qcom,rpm-msm8974";
qcom,smd-channels = "rpm_requests";
@@ -675,7 +675,7 @@
#reset-cells = <1>;
ulpi {
- usb_hs1_phy: phy@a {
+ usb_hs1_phy: phy-0 {
compatible = "qcom,usb-hs-phy-msm8974",
"qcom,usb-hs-phy";
#phy-cells = <0>;
@@ -686,7 +686,7 @@
status = "disabled";
};
- usb_hs2_phy: phy@b {
+ usb_hs2_phy: phy-1 {
compatible = "qcom,usb-hs-phy-msm8974",
"qcom,usb-hs-phy";
#phy-cells = <0>;
@@ -706,7 +706,7 @@
clock-names = "core";
};
- pronto: remoteproc@fb21b000 {
+ pronto: remoteproc@fb204000 {
compatible = "qcom,pronto-v2-pil", "qcom,pronto";
reg = <0xfb204000 0x2000>, <0xfb202000 0x1000>, <0xfb21b000 0x3000>;
reg-names = "ccu", "dxe", "pmu";
@@ -745,7 +745,7 @@
qcom,mmio = <&pronto>;
- bt {
+ bluetooth {
compatible = "qcom,wcnss-bt";
};
diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi
index 342c3d14001e..06c2646dd673 100644
--- a/arch/arm/boot/dts/qcom-sdx55.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx55.dtsi
@@ -515,7 +515,7 @@
#hwlock-cells = <1>;
};
- tcsr: syscon@1fcb000 {
+ tcsr: syscon@1fc0000 {
compatible = "qcom,sdx55-tcsr", "syscon";
reg = <0x01fc0000 0x1000>;
};
@@ -792,7 +792,7 @@
};
};
- apps_rsc: rsc@17840000 {
+ apps_rsc: rsc@17830000 {
compatible = "qcom,rpmh-rsc";
reg = <0x17830000 0x10000>, <0x17840000 0x10000>;
reg-names = "drv-0", "drv-1";
diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
index 57bc3b03d3aa..02d8d6e241ae 100644
--- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts
+++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
@@ -250,6 +250,25 @@
status = "okay";
};
+&pcie_ep {
+ pinctrl-0 = <&pcie_ep_clkreq_default
+ &pcie_ep_perst_default
+ &pcie_ep_wake_default>;
+ pinctrl-names = "default";
+
+ reset-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;
+
+ status = "okay";
+};
+
+&pcie_phy {
+ vdda-phy-supply = <&vreg_l1b_1p2>;
+ vdda-pll-supply = <&vreg_l4b_0p88>;
+
+ status = "okay";
+};
+
&qpic_bam {
status = "okay";
};
@@ -274,6 +293,29 @@
status = "okay";
};
+&tlmm {
+ pcie_ep_clkreq_default: pcie-ep-clkreq-default-state {
+ pins = "gpio56";
+ function = "pcie_clkreq";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ pcie_ep_perst_default: pcie-ep-perst-default-state {
+ pins = "gpio57";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ pcie_ep_wake_default: pcie-ep-wake-default-state {
+ pins = "gpio53";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
&usb {
status = "okay";
};
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 525dd8a1f664..1a3583029a64 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/clock/qcom,gcc-sdx65.h>
#include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
@@ -295,12 +296,98 @@
status = "disabled";
};
+ pcie_ep: pcie-ep@1c00000 {
+ compatible = "qcom,sdx65-pcie-ep", "qcom,sdx55-pcie-ep";
+ reg = <0x01c00000 0x3000>,
+ <0x40000000 0xf1d>,
+ <0x40000f20 0xa8>,
+ <0x40001000 0x1000>,
+ <0x40200000 0x100000>,
+ <0x01c03000 0x3000>;
+ reg-names = "parf",
+ "dbi",
+ "elbi",
+ "atu",
+ "addr_space",
+ "mmio";
+
+ qcom,perst-regs = <&tcsr 0xb258 0xb270>;
+
+ clocks = <&gcc GCC_PCIE_AUX_CLK>,
+ <&gcc GCC_PCIE_CFG_AHB_CLK>,
+ <&gcc GCC_PCIE_MSTR_AXI_CLK>,
+ <&gcc GCC_PCIE_SLV_AXI_CLK>,
+ <&gcc GCC_PCIE_SLV_Q2A_AXI_CLK>,
+ <&gcc GCC_PCIE_SLEEP_CLK>,
+ <&gcc GCC_PCIE_0_CLKREF_EN>;
+ clock-names = "aux",
+ "cfg",
+ "bus_master",
+ "bus_slave",
+ "slave_q2a",
+ "sleep",
+ "ref";
+
+ interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "global", "doorbell";
+
+ resets = <&gcc GCC_PCIE_BCR>;
+ reset-names = "core";
+
+ power-domains = <&gcc PCIE_GDSC>;
+
+ phys = <&pcie_phy>;
+ phy-names = "pcie-phy";
+
+ max-link-speed = <3>;
+ num-lanes = <2>;
+
+ status = "disabled";
+ };
+
+ pcie_phy: phy@1c06000 {
+ compatible = "qcom,sdx65-qmp-gen4x2-pcie-phy";
+ reg = <0x01c06000 0x2000>;
+
+ clocks = <&gcc GCC_PCIE_AUX_PHY_CLK_SRC>,
+ <&gcc GCC_PCIE_CFG_AHB_CLK>,
+ <&gcc GCC_PCIE_0_CLKREF_EN>,
+ <&gcc GCC_PCIE_RCHNG_PHY_CLK>,
+ <&gcc GCC_PCIE_PIPE_CLK>;
+ clock-names = "aux",
+ "cfg_ahb",
+ "ref",
+ "rchng",
+ "pipe";
+
+ resets = <&gcc GCC_PCIE_PHY_BCR>;
+ reset-names = "phy";
+
+ assigned-clocks = <&gcc GCC_PCIE_RCHNG_PHY_CLK>;
+ assigned-clock-rates = <100000000>;
+
+ power-domains = <&gcc PCIE_GDSC>;
+
+ #clock-cells = <0>;
+ clock-output-names = "pcie_pipe_clk";
+
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+
tcsr_mutex: hwlock@1f40000 {
compatible = "qcom,tcsr-mutex";
reg = <0x01f40000 0x40000>;
#hwlock-cells = <1>;
};
+ tcsr: syscon@1fcb000 {
+ compatible = "qcom,sdx65-tcsr", "syscon";
+ reg = <0x01fc0000 0x1000>;
+ };
+
ipa: ipa@3f40000 {
compatible = "qcom,sdx65-ipa";
generated by cgit v1.2.3 (git 2.39.0) at 2024-08-21 10:38:04 +0300