diff options
| -rw-r--r-- | drivers/gpu/drm/xe/xe_engine.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_guc_fwif.h | 12 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_guc_submit.c | 14 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_hw_engine.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_uc.c | 10 |
5 files changed, 21 insertions, 21 deletions
diff --git a/drivers/gpu/drm/xe/xe_engine.c b/drivers/gpu/drm/xe/xe_engine.c index af75c9a0ea7b..bd800eaa37a6 100644 --- a/drivers/gpu/drm/xe/xe_engine.c +++ b/drivers/gpu/drm/xe/xe_engine.c @@ -173,7 +173,7 @@ enum xe_engine_priority xe_engine_device_get_max_priority(struct xe_device *xe) { return capable(CAP_SYS_NICE) ? XE_ENGINE_PRIORITY_HIGH : - XE_ENGINE_PRIORITY_NORMAL; + XE_ENGINE_PRIORITY_NORMAL; } static int engine_set_priority(struct xe_device *xe, struct xe_engine *e, @@ -540,7 +540,7 @@ int xe_engine_create_ioctl(struct drm_device *dev, void *data, return -EFAULT; if (XE_IOCTL_ERR(xe, eci[0].gt_id >= xe->info.tile_count)) - return -EINVAL; + return -EINVAL; if (eci[0].engine_class == DRM_XE_ENGINE_CLASS_VM_BIND) { for_each_gt(gt, xe, id) { diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h index 27d132ce2087..e215e8b2c17a 100644 --- a/drivers/gpu/drm/xe/xe_guc_fwif.h +++ b/drivers/gpu/drm/xe/xe_guc_fwif.h @@ -64,19 +64,19 @@ struct guc_ctxt_registration_info { /* 32-bit KLV structure as used by policy updates and others */ struct guc_klv_generic_dw_t { - u32 kl; - u32 value; + u32 kl; + u32 value; } __packed; /* Format of the UPDATE_CONTEXT_POLICIES H2G data packet */ struct guc_update_engine_policy_header { - u32 action; - u32 guc_id; + u32 action; + u32 guc_id; } __packed; struct guc_update_engine_policy { - struct guc_update_engine_policy_header header; - struct guc_klv_generic_dw_t klv[GUC_CONTEXT_POLICIES_KLV_NUM_IDS]; + struct guc_update_engine_policy_header header; + struct guc_klv_generic_dw_t klv[GUC_CONTEXT_POLICIES_KLV_NUM_IDS]; } __packed; /* GUC_CTL_* - Parameters for loading the GuC */ diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c index 9c0fd1368b77..0c07cd4ad204 100644 --- a/drivers/gpu/drm/xe/xe_guc_submit.c +++ b/drivers/gpu/drm/xe/xe_guc_submit.c @@ -353,17 +353,17 @@ static const int xe_engine_prio_to_guc[] = { static void init_policies(struct xe_guc *guc, struct xe_engine *e) { - struct engine_policy policy; + struct engine_policy policy; enum xe_engine_priority prio = e->priority; u32 timeslice_us = e->sched_props.timeslice_us; u32 preempt_timeout_us = e->sched_props.preempt_timeout_us; XE_BUG_ON(!engine_registered(e)); - __guc_engine_policy_start_klv(&policy, e->guc->id); - __guc_engine_policy_add_priority(&policy, xe_engine_prio_to_guc[prio]); - __guc_engine_policy_add_execution_quantum(&policy, timeslice_us); - __guc_engine_policy_add_preemption_timeout(&policy, preempt_timeout_us); + __guc_engine_policy_start_klv(&policy, e->guc->id); + __guc_engine_policy_add_priority(&policy, xe_engine_prio_to_guc[prio]); + __guc_engine_policy_add_execution_quantum(&policy, timeslice_us); + __guc_engine_policy_add_preemption_timeout(&policy, preempt_timeout_us); xe_guc_ct_send(&guc->ct, (u32 *)&policy.h2g, __guc_engine_policy_action_size(&policy), 0, 0); @@ -373,8 +373,8 @@ static void set_min_preemption_timeout(struct xe_guc *guc, struct xe_engine *e) { struct engine_policy policy; - __guc_engine_policy_start_klv(&policy, e->guc->id); - __guc_engine_policy_add_preemption_timeout(&policy, 1); + __guc_engine_policy_start_klv(&policy, e->guc->id); + __guc_engine_policy_add_preemption_timeout(&policy, 1); xe_guc_ct_send(&guc->ct, (u32 *)&policy.h2g, __guc_engine_policy_action_size(&policy), 0, 0); diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c index b7b02c96e998..1af5cccd1142 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.c +++ b/drivers/gpu/drm/xe/xe_hw_engine.c @@ -312,7 +312,7 @@ hw_engine_setup_default_state(struct xe_hw_engine *hwe) /* TODO: missing handling of HAS_L3_CCS_READ platforms */ const u8 mocs_read_idx = gt->mocs.uc_index; u32 ring_cmd_cctl_val = REG_FIELD_PREP(CMD_CCTL_WRITE_OVERRIDE_MASK, mocs_write_idx) | - REG_FIELD_PREP(CMD_CCTL_READ_OVERRIDE_MASK, mocs_read_idx); + REG_FIELD_PREP(CMD_CCTL_READ_OVERRIDE_MASK, mocs_read_idx); struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(hwe); const struct xe_rtp_entry_sr engine_entries[] = { /* diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c index 70eabf567156..e244d27b55d5 100644 --- a/drivers/gpu/drm/xe/xe_uc.c +++ b/drivers/gpu/drm/xe/xe_uc.c @@ -201,14 +201,14 @@ int xe_uc_start(struct xe_uc *uc) static void uc_reset_wait(struct xe_uc *uc) { - int ret; + int ret; again: - xe_guc_reset_wait(&uc->guc); + xe_guc_reset_wait(&uc->guc); - ret = xe_uc_reset_prepare(uc); - if (ret) - goto again; + ret = xe_uc_reset_prepare(uc); + if (ret) + goto again; } int xe_uc_suspend(struct xe_uc *uc) |