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-rw-r--r--drivers/cxl/core/pci.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
index 8c26e9fefa46..eff20e83d0a6 100644
--- a/drivers/cxl/core/pci.c
+++ b/drivers/cxl/core/pci.c
@@ -810,7 +810,7 @@ static void cxl_disable_rch_root_ints(struct cxl_dport *dport)
* the root cmd register's interrupts is required. But, PCI spec
* shows these are disabled by default on reset.
*/
- if (bridge->native_cxl_error) {
+ if (bridge->native_aer) {
aer_cmd_mask = (PCI_ERR_ROOT_CMD_COR_EN |
PCI_ERR_ROOT_CMD_NONFATAL_EN |
PCI_ERR_ROOT_CMD_FATAL_EN);
@@ -826,7 +826,7 @@ void cxl_setup_parent_dport(struct device *host, struct cxl_dport *dport)
struct pci_host_bridge *host_bridge;
host_bridge = to_pci_host_bridge(dport_dev);
- if (host_bridge->native_cxl_error)
+ if (host_bridge->native_aer)
dport->rcrb.aer_cap = cxl_rcrb_to_aer(dport_dev, dport->rcrb.base);
dport->reg_map.host = host;