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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/socionext,uniphier-xdmac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Socionext UniPhier external DMA controller
+
+description: |
+ This describes the devicetree bindings for an external DMA engine to perform
+ memory-to-memory or peripheral-to-memory data transfer capable of supporting
+ 16 channels, implemented in Socionext UniPhier SoCs.
+
+maintainers:
+ - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
+
+allOf:
+ - $ref: "dma-controller.yaml#"
+
+properties:
+ compatible:
+ const: socionext,uniphier-xdmac
+
+ reg:
+ items:
+ - description: XDMAC base register region (offset and length)
+ - description: XDMAC extension register region (offset and length)
+
+ interrupts:
+ maxItems: 1
+
+ "#dma-cells":
+ const: 2
+ description: |
+ DMA request from clients consists of 2 cells:
+ 1. Channel index
+ 2. Transfer request factor number, If no transfer factor, use 0.
+ The number is SoC-specific, and this should be specified with
+ relation to the device to use the DMA controller.
+
+ dma-channels:
+ minimum: 1
+ maximum: 16
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - "#dma-cells"
+
+examples:
+ - |
+ xdmac: dma-controller@5fc10000 {
+ compatible = "socionext,uniphier-xdmac";
+ reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
+ interrupts = <0 188 4>;
+ #dma-cells = <2>;
+ dma-channels = <16>;
+ };
+
+...