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Diffstat (limited to 'Documentation/devicetree/bindings/usb/rockchip,dwc3.txt')
-rw-r--r-- | Documentation/devicetree/bindings/usb/rockchip,dwc3.txt | 56 |
1 files changed, 0 insertions, 56 deletions
diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt b/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt deleted file mode 100644 index 94520493233b..000000000000 --- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt +++ /dev/null @@ -1,56 +0,0 @@ -Rockchip SuperSpeed DWC3 USB SoC controller - -Required properties: -- compatible: should contain "rockchip,rk3399-dwc3" for rk3399 SoC -- clocks: A list of phandle + clock-specifier pairs for the - clocks listed in clock-names -- clock-names: Should contain the following: - "ref_clk" Controller reference clk, have to be 24 MHz - "suspend_clk" Controller suspend clk, have to be 24 MHz or 32 KHz - "bus_clk" Master/Core clock, have to be >= 62.5 MHz for SS - operation and >= 30MHz for HS operation - "grf_clk" Controller grf clk - -Required child node: -A child node must exist to represent the core DWC3 IP block. The name of -the node is not important. The content of the node is defined in dwc3.txt. - -Phy documentation is provided in the following places: -Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml - USB2.0 PHY -Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt - Type-C PHY - -Example device nodes: - - usbdrd3_0: usb@fe800000 { - compatible = "rockchip,rk3399-dwc3"; - clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>, - <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_GRF>; - clock-names = "ref_clk", "suspend_clk", - "bus_clk", "grf_clk"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - usbdrd_dwc3_0: dwc3@fe800000 { - compatible = "snps,dwc3"; - reg = <0x0 0xfe800000 0x0 0x100000>; - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; - dr_mode = "otg"; - }; - }; - - usbdrd3_1: usb@fe900000 { - compatible = "rockchip,rk3399-dwc3"; - clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>, - <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_GRF>; - clock-names = "ref_clk", "suspend_clk", - "bus_clk", "grf_clk"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - usbdrd_dwc3_1: dwc3@fe900000 { - compatible = "snps,dwc3"; - reg = <0x0 0xfe900000 0x0 0x100000>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; - dr_mode = "otg"; - }; - }; |